From 5f06ff044dc0272e1daea0873ddaaf1ebce3f77c Mon Sep 17 00:00:00 2001 From: Chao Wang <26245345+ChaoWao@users.noreply.github.com> Date: Fri, 26 Jun 2026 15:04:45 +0800 Subject: [PATCH] Fix: add mandatory arg_index to l3_l2_orch_comm callables PR #1015 added the l3_l2_orch_comm family (a5 scene test + a2a3 stream example) with CoreCallable.build calls that omit arg_index. PR #1123 had already made arg_index mandatory (parallel to signature, equal length) and removed the contiguous fallback, so the two merged without reconciling. Every PR that merges against current main then fails at build time with: ValueError: CoreCallable.build: arg_index is required and must be parallel to signature (equal length) affecting st-sim-a5 (the a5 test) and st-sim-a2a3 / st-onboard-a2a3 (the a2a3 example). Declare arg_index=[0, 1] for signature=[D.IN, D.OUT] at both sites, matching the explicit slot mapping every other migrated incore uses: - tests/st/a5/.../l3_l2_orch_comm/test_l3_l2_orch_comm.py - examples/a2a3/.../l3_l2_orch_comm_stream/l3_l2_orch_comm_stream.py --- .../l3_l2_orch_comm_stream/l3_l2_orch_comm_stream.py | 2 +- .../l3_l2_orch_comm/test_l3_l2_orch_comm.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/a2a3/tensormap_and_ringbuffer/l3_l2_orch_comm_stream/l3_l2_orch_comm_stream.py b/examples/a2a3/tensormap_and_ringbuffer/l3_l2_orch_comm_stream/l3_l2_orch_comm_stream.py index 0feeab4a2f..555edb4a39 100644 --- a/examples/a2a3/tensormap_and_ringbuffer/l3_l2_orch_comm_stream/l3_l2_orch_comm_stream.py +++ b/examples/a2a3/tensormap_and_ringbuffer/l3_l2_orch_comm_stream/l3_l2_orch_comm_stream.py @@ -66,7 +66,7 @@ def _build_chip_callable(platform: str) -> ChipCallable: signature=[], func_name="l3_l2_orch_comm_orchestration", binary=orch, - children=[(0, CoreCallable.build(signature=[D.IN, D.OUT], binary=aiv))], + children=[(0, CoreCallable.build(signature=[D.IN, D.OUT], arg_index=[0, 1], binary=aiv))], ) diff --git a/tests/st/a5/tensormap_and_ringbuffer/l3_l2_orch_comm/test_l3_l2_orch_comm.py b/tests/st/a5/tensormap_and_ringbuffer/l3_l2_orch_comm/test_l3_l2_orch_comm.py index 7449c194d6..d5813fd15c 100644 --- a/tests/st/a5/tensormap_and_ringbuffer/l3_l2_orch_comm/test_l3_l2_orch_comm.py +++ b/tests/st/a5/tensormap_and_ringbuffer/l3_l2_orch_comm/test_l3_l2_orch_comm.py @@ -67,7 +67,7 @@ def _build_chip_callable(platform: str) -> ChipCallable: signature=[], func_name="l3_l2_orch_comm_orchestration", binary=orch, - children=[(0, CoreCallable.build(signature=[D.IN, D.OUT], binary=aiv))], + children=[(0, CoreCallable.build(signature=[D.IN, D.OUT], arg_index=[0, 1], binary=aiv))], )