diff --git a/src/a2a3/runtime/host_build_graph/host/runtime_maker.cpp b/src/a2a3/runtime/host_build_graph/host/runtime_maker.cpp
index d2475e1c92..89f74e5852 100644
--- a/src/a2a3/runtime/host_build_graph/host/runtime_maker.cpp
+++ b/src/a2a3/runtime/host_build_graph/host/runtime_maker.cpp
@@ -630,7 +630,7 @@ int32_t run_host_orchestration(
     // actually needs, and compact_live_image moves every address the orchestrator
     // wrote onto the real base before the image travels.
     if (!orchestrator.init(
-            host_sm, reinterpret_cast<void *>(HEAP_VIRTUAL_BASE), HEAP_VIRTUAL_CAPACITY, task_capacity, rt->scheduler
+            host_sm, reinterpret_cast<void *>(HEAP_VIRTUAL_BASE), HEAP_VIRTUAL_CAPACITY, task_capacity
         )) {
         LOG_ERROR("host-orch: orchestrator init against host SM failed");
         return PTO_RUNTIME_ERR_INTERNAL;
@@ -716,14 +716,12 @@ int32_t run_host_orchestration(
     {
         const OrchProfilingData prof = orchestrator_get_profiling();
         const std::pair<const char *, uint64_t> steps[] = {
-            {"alloc", prof.alloc_cycle},   {"args", prof.args_cycle},   {"lookup", prof.lookup_cycle},
-            {"insert", prof.insert_cycle}, {"fanin", prof.fanin_cycle},
+            {"alloc", prof.alloc_ns},   {"args", prof.args_ns},   {"lookup", prof.lookup_ns},
+            {"insert", prof.insert_ns}, {"fanin", prof.fanin_ns},
         };
         for (const auto &step : steps) {
             if (step.second == 0) continue;
-            LOG_TIMING(
-                "host-orch step=%s cycles=%" PRIu64 " submits=%" PRId64, step.first, step.second, prof.submit_count
-            );
+            LOG_TIMING("host-orch step=%s ns=%" PRIu64 " submits=%" PRId64, step.first, step.second, prof.submit_count);
         }
     }
 #endif
diff --git a/src/a5/runtime/host_build_graph/host/runtime_maker.cpp b/src/a5/runtime/host_build_graph/host/runtime_maker.cpp
index cf67fa9104..478be50b87 100644
--- a/src/a5/runtime/host_build_graph/host/runtime_maker.cpp
+++ b/src/a5/runtime/host_build_graph/host/runtime_maker.cpp
@@ -630,7 +630,7 @@ int32_t run_host_orchestration(
     // actually needs, and compact_live_image moves every address the orchestrator
     // wrote onto the real base before the image travels.
     if (!orchestrator.init(
-            host_sm, reinterpret_cast<void *>(HEAP_VIRTUAL_BASE), HEAP_VIRTUAL_CAPACITY, task_capacity, rt->scheduler
+            host_sm, reinterpret_cast<void *>(HEAP_VIRTUAL_BASE), HEAP_VIRTUAL_CAPACITY, task_capacity
         )) {
         LOG_ERROR("host-orch: orchestrator init against host SM failed");
         return PTO_RUNTIME_ERR_INTERNAL;
@@ -716,14 +716,12 @@ int32_t run_host_orchestration(
     {
         const OrchProfilingData prof = orchestrator_get_profiling();
         const std::pair<const char *, uint64_t> steps[] = {
-            {"alloc", prof.alloc_cycle},   {"args", prof.args_cycle},   {"lookup", prof.lookup_cycle},
-            {"insert", prof.insert_cycle}, {"fanin", prof.fanin_cycle},
+            {"alloc", prof.alloc_ns},   {"args", prof.args_ns},   {"lookup", prof.lookup_ns},
+            {"insert", prof.insert_ns}, {"fanin", prof.fanin_ns},
         };
         for (const auto &step : steps) {
             if (step.second == 0) continue;
-            LOG_TIMING(
-                "host-orch step=%s cycles=%" PRIu64 " submits=%" PRId64, step.first, step.second, prof.submit_count
-            );
+            LOG_TIMING("host-orch step=%s ns=%" PRIu64 " submits=%" PRId64, step.first, step.second, prof.submit_count);
         }
     }
 #endif
diff --git a/src/common/host_build_graph/host/aicpu_shims.cpp b/src/common/host_build_graph/host/aicpu_shims.cpp
deleted file mode 100644
index 83abb28d3e..0000000000
--- a/src/common/host_build_graph/host/aicpu_shims.cpp
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright (c) PyPTO Contributors.
- * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
- * CANN Open Software License Agreement Version 2.0 (the "License").
- * Please refer to the License for details. You may not use this file except in compliance with the License.
- * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
- * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
- * See LICENSE in the root of the software repository for the full text of the License.
- * -----------------------------------------------------------------------------------------------------------
- */
-
-/**
- * host_build_graph host-side definitions of two AICPU platform primitives
- *
- * The host orchestrator reaches both through headers that describe device
- * hardware, so each needs a definition that works where that hardware is absent.
- * The AICPU build has its own in platform/.../{device_time,platform_regs}.cpp and
- * never compiles this file; the two definitions are selected by which target
- * compiles which directory, so neither is weak.
- *
- * Both carry hidden visibility, which is load-bearing rather than tidiness. Each
- * stands in for hardware only inside this library, and the AICPU carries a
- * same-named definition whose value means something else — a real cycle counter,
- * a real register window. Keeping these off the dynamic symbol table is what makes
- * it impossible for another module to bind one of those names to a host wall-clock
- * or a dummy sink.
- */
-
-#include <time.h>
-
-#include <cstdint>
-
-#include "aicpu/device_time.h"
-#include "aicpu/platform_regs.h"
-#include "common/platform_config.h"
-
-// Monotonic wall-clock in AICPU cycle units, so a cycle-denominated deadline
-// evaluated during host orchestration fires at the wall-clock it was sized for.
-// A constant 0 would instead make every such backstop a no-op and spin forever.
-__attribute__((visibility("hidden"))) uint64_t get_sys_cnt_aicpu() {
-    struct timespec ts;
-    clock_gettime(CLOCK_MONOTONIC, &ts);
-    // Scale sec and nsec separately (divisor is the constant 1e9): avoids a
-    // div-by-zero when PLATFORM_PROF_SYS_CNT_FREQ >= 1 GHz and the truncation
-    // error a `1e9 / FREQ` divisor would introduce for non-dividing frequencies.
-    return static_cast<uint64_t>(ts.tv_sec) * PLATFORM_PROF_SYS_CNT_FREQ +
-           static_cast<uint64_t>(ts.tv_nsec) * PLATFORM_PROF_SYS_CNT_FREQ / 1000000000ull;
-}
-
-// AICore register window. The orchestrator's route_ready_once path transitively
-// ODR-uses the early-dispatch doorbell inline (scheduler.h ring_one_doorbell), but
-// host graph-build gates no core, so the doorbell never fires and the address only
-// has to be readable and writable.
-__attribute__((visibility("hidden"))) volatile uint32_t *get_reg_ptr(uint64_t, RegId) {
-    static volatile uint32_t sink = 0;
-    return &sink;
-}
diff --git a/src/common/host_build_graph/host/orchestrator.cpp b/src/common/host_build_graph/host/orchestrator.cpp
index 9564456aba..2599588634 100644
--- a/src/common/host_build_graph/host/orchestrator.cpp
+++ b/src/common/host_build_graph/host/orchestrator.cpp
@@ -58,10 +58,6 @@
 #include "host_build_graph/types.h"
 #include "tensor.h"
 
-#if SIMPLER_DFX
-#include "aicpu/args_dump_aicpu.h"
-#endif
-
 // Raises the two edge kinds compute_task_fanin can discover, for the capture
 // instantiation. Shared by the ordinary submit path and the outer GRAPH task so
 // both describe an edge the same way.
@@ -80,43 +76,49 @@ struct DepGraphAnnotate {
 // Orchestrator Profiling (compile-time toggle)
 // =============================================================================
 #if SIMPLER_ORCH_PROFILING
-#include "aicpu/device_time.h"
-#include "aicpu/chip_swimlane_collector_aicpu.h"
-// Accumulated cycles per sub-step (only needed for ORCH_PROFILING export)
-static uint64_t g_orch_alloc_cycle = 0;   // unified task+heap alloc
-static uint64_t g_orch_args_cycle = 0;    // param copy
-static uint64_t g_orch_lookup_cycle = 0;  // tensormap lookup + dep building
-static uint64_t g_orch_insert_cycle = 0;  // tensormap insert
-static uint64_t g_orch_fanin_cycle = 0;   // fanin list + early-return check
+// Accumulated nanoseconds per sub-step (only needed for ORCH_PROFILING export)
+static uint64_t g_orch_alloc_ns = 0;   // unified task+heap alloc
+static uint64_t g_orch_args_ns = 0;    // param copy
+static uint64_t g_orch_lookup_ns = 0;  // tensormap lookup + dep building
+static uint64_t g_orch_insert_ns = 0;  // tensormap insert
+static uint64_t g_orch_fanin_ns = 0;   // fanin list + early-return check
 static int64_t g_orch_submit_count = 0;
 static uint32_t g_orch_submit_idx = 0;
-uint64_t g_orch_fanin_wait_cycle = 0;
+uint64_t g_orch_fanin_wait_ns = 0;
 uint64_t g_orch_args_atomic_count = 0;
-// Cycle accumulation is unconditional under SIMPLER_ORCH_PROFILING (that's what
-// the flag is for) and feeds the per-sub-step `g_orch_*_cycle` cumulatives
-// printed in the cold-path log. Per-event records are a separate channel on a
-// separate clock — see ORCH_PHASE_END below.
-#define CYCLE_COUNT_START()                  \
-    uint64_t _t0 = get_sys_cnt_aicpu(), _t1; \
+
+// The orchestrator runs on the host, so its sub-steps are timed by the host's own
+// monotonic clock. Static, so the timing costs a call to clock_gettime and no
+// symbol resolution.
+static inline uint64_t orch_now_ns() {
+    struct timespec ts;
+    clock_gettime(CLOCK_MONOTONIC, &ts);
+    return static_cast<uint64_t>(ts.tv_sec) * 1000000000ull + static_cast<uint64_t>(ts.tv_nsec);
+}
+
+// Accumulation is unconditional under SIMPLER_ORCH_PROFILING (that's what the flag
+// is for) and feeds the per-sub-step `g_orch_*_ns` cumulatives printed in the
+// cold-path log. Per-event records are a separate channel on a separate clock —
+// see ORCH_PHASE_END below.
+#define ORCH_STEP_START()              \
+    uint64_t _t0 = orch_now_ns(), _t1; \
     (void)_t1
-#define CYCLE_COUNT_LAP(acc)       \
-    do {                           \
-        _t1 = get_sys_cnt_aicpu(); \
-        acc += (_t1 - _t0);        \
-        _t0 = _t1;                 \
+#define ORCH_STEP_LAP(acc)   \
+    do {                     \
+        _t1 = orch_now_ns(); \
+        acc += (_t1 - _t0);  \
+        _t0 = _t1;           \
     } while (0)
 #elif SIMPLER_DFX
-#include "aicpu/device_time.h"
-#include "aicpu/chip_swimlane_collector_aicpu.h"
 // submit_idx tags a record with its position in the orchestration's submit order.
 static uint32_t g_orch_submit_idx = 0;
 // The per-sub-step accumulators exist only in an ORCH_PROFILING build, so at this
 // level there is nothing to time.
-#define CYCLE_COUNT_START()
-#define CYCLE_COUNT_LAP(acc)
+#define ORCH_STEP_START()
+#define ORCH_STEP_LAP(acc)
 #else
-#define CYCLE_COUNT_START()
-#define CYCLE_COUNT_LAP(acc)
+#define ORCH_STEP_START()
+#define ORCH_STEP_LAP(acc)
 #endif
 
 #if SIMPLER_DFX
@@ -207,9 +209,7 @@ void OrchestratorState::report_fatal(int32_t error_code, const char *func, const
     va_end(args);
 }
 
-bool OrchestratorState::init(
-    void *sm_base, void *gm_heap, uint64_t heap_size, uint64_t max_tasks, SchedulerState *scheduler_arg
-) {
+bool OrchestratorState::init(void *sm_base, void *gm_heap, uint64_t heap_size, uint64_t max_tasks) {
     // Reset in place rather than by move-assignment: fatal_code is a std::atomic,
     // which is neither copy- nor move-assignable, and a re-init has to clear every
     // field the previous pass left behind (the pool cursors below rely on it).
@@ -219,7 +219,6 @@ bool OrchestratorState::init(
     always_assert(max_tasks > 0);
 
     orch->sm_header = reinterpret_cast<SharedMemoryHeader *>(sm_base);
-    orch->scheduler = scheduler_arg;
 
     orch->task_allocator.init(static_cast<int32_t>(max_tasks), gm_heap, heap_size, &orch->fatal_code);
 
@@ -1613,7 +1612,7 @@ static TaskOutputTensors submit_task_common(
     OrchestratorState *orch, const CoreTaskArgs &args, ActiveMask active_mask, TaskAttrs task_attrs,
     int32_t aic_kernel_id, int32_t aiv0_kernel_id, int32_t aiv1_kernel_id
 ) {
-    CYCLE_COUNT_START();
+    ORCH_STEP_START();
     ORCH_PHASE_START();
     TaskOutputTensors result;
     DispatchPredicate resolved_predicate{};
@@ -1623,7 +1622,6 @@ static TaskOutputTensors submit_task_common(
     if (!prepare_task(orch, args, layout.total_output_size, active_mask, task_attrs, &prepared)) {
         return result;
     }
-    SchedulerState *sched = orch->scheduler;
     TaskId task_id = prepared.task_id;
     TaskDescriptor &task = *prepared.task;
     TaskPayload &payload = *prepared.payload;
@@ -1655,7 +1653,7 @@ static TaskOutputTensors submit_task_common(
     int32_t *fanin_slots = payload.fanin_data();
     payload.fanin_count = 0;
 
-    CYCLE_COUNT_LAP(g_orch_alloc_cycle);
+    ORCH_STEP_LAP(g_orch_alloc_ns);
 
 #if SIMPLER_DFX
     if (layout.total_output_size > 0) {
@@ -1707,7 +1705,7 @@ static TaskOutputTensors submit_task_common(
         }
     }
 
-    CYCLE_COUNT_LAP(g_orch_lookup_cycle);
+    ORCH_STEP_LAP(g_orch_lookup_ns);
 
     // === STEP 4: Register outputs/inouts in TensorMap (must be separate from lookup) ===
     // Reserve pool capacity for this task's inserts before registering, so an
@@ -1719,7 +1717,7 @@ static TaskOutputTensors submit_task_common(
     }
     register_task_outputs(dep_inputs, task_id, orch->tensor_map, orch->in_manual_scope());
 
-    CYCLE_COUNT_LAP(g_orch_insert_cycle);
+    ORCH_STEP_LAP(g_orch_insert_ns);
 
     // === STEP 5: Batch-write to GM (single cache line burst) ===
     // Deferred from allocation phase to avoid scattered GM writes that get
@@ -1741,7 +1739,7 @@ static TaskOutputTensors submit_task_common(
     // Predicate validation runs before task allocation. Copy the resolved, bounded
     // operand address into the device payload only after the rest of the payload exists.
     payload.predicate = resolved_predicate;
-    CYCLE_COUNT_LAP(g_orch_args_cycle);
+    ORCH_STEP_LAP(g_orch_args_ns);
 
     // === STEP 6: close the fanin region (device boot classifies) ===
     // Polling + host-orch: append_fanin_or_fail already wrote each producer's local
@@ -1761,9 +1759,7 @@ static TaskOutputTensors submit_task_common(
     debug_assert(orch->fanin_pool_cursor == static_cast<int32_t>(payload.fanin_data() - orch->fanin_pool));
     orch->fanin_pool_cursor += CHIP_ALIGN_UP(payload.fanin_count, ARG_POOL_ALIGN / (int32_t)sizeof(int32_t));
 
-    (void)sched;
-
-    CYCLE_COUNT_LAP(g_orch_fanin_cycle);
+    ORCH_STEP_LAP(g_orch_fanin_ns);
     ORCH_PHASE_END(HostPhaseKind::OrchSubmitTask, task_id.raw);
 
 #if SIMPLER_DFX
@@ -2717,7 +2713,6 @@ TaskOutputTensors OrchestratorState::submit_task(const MixedKernels &mixed_kerne
         orch_mark_fatal(orch, SIMPLER_ERROR_INVALID_ARGS);
         return TaskOutputTensors{};
     }
-    always_assert(orch->scheduler != nullptr);
     // === Validate submit inputs ===
     ActiveMask active_mask = mixed_kernels.to_active_mask();
     if (!static_cast<bool>(active_mask)) {
@@ -2805,7 +2800,6 @@ TaskOutputTensors OrchestratorState::submit_dummy_task(const CoreTaskArgs &args)
         orch_mark_fatal(orch, SIMPLER_ERROR_INVALID_ARGS);
         return TaskOutputTensors{};
     }
-    always_assert(orch->scheduler != nullptr);
 
     // Dummy tasks never dispatch to an AICore, so sync_start / has_predicate do
     // not apply; only the early-dispatch hint and timing tag carry over.
@@ -2851,7 +2845,7 @@ TaskOutputTensors OrchestratorState::alloc_tensors(const CoreTaskArgs &args) {
         }
     }
 
-    CYCLE_COUNT_START();
+    ORCH_STEP_START();
     ORCH_PHASE_START();
 
     if (args.has_error) {
@@ -2883,7 +2877,7 @@ TaskOutputTensors OrchestratorState::alloc_tensors(const CoreTaskArgs &args) {
     TaskDescriptor &task = *prepared.task;
     TaskPayload &payload = *prepared.payload;
 
-    CYCLE_COUNT_LAP(g_orch_alloc_cycle);
+    ORCH_STEP_LAP(g_orch_alloc_ns);
 
 #if SIMPLER_DFX
     if (layout.total_output_size > 0) {
@@ -2903,7 +2897,7 @@ TaskOutputTensors OrchestratorState::alloc_tensors(const CoreTaskArgs &args) {
     outputs.set_task_id(prepared.task_id);
     payload.init(args, outputs, prepared.alloc_result, layout);
     payload.fanin_count = 0;  // hidden-alloc tasks have no producer dependencies
-    CYCLE_COUNT_LAP(g_orch_args_cycle);
+    ORCH_STEP_LAP(g_orch_args_ns);
 
     if (prepared.slot_state != nullptr) {
         // Hidden alloc tasks complete inline in the orchestrator before any
@@ -2935,7 +2929,7 @@ TaskOutputTensors OrchestratorState::alloc_tensors(const CoreTaskArgs &args) {
     }
     orch->inline_completed_tasks++;
 
-    CYCLE_COUNT_LAP(g_orch_fanin_cycle);
+    ORCH_STEP_LAP(g_orch_fanin_ns);
     ORCH_PHASE_END(HostPhaseKind::OrchAllocTensors, prepared.task_id.raw);
 
 #if SIMPLER_DFX
@@ -2969,22 +2963,22 @@ void OrchestratorState::mark_done() {
 #if SIMPLER_ORCH_PROFILING
 OrchProfilingData orchestrator_get_profiling() {
     OrchProfilingData d;
-    d.alloc_cycle = g_orch_alloc_cycle;
-    d.args_cycle = g_orch_args_cycle;
-    d.lookup_cycle = g_orch_lookup_cycle;
-    d.insert_cycle = g_orch_insert_cycle;
-    d.fanin_cycle = g_orch_fanin_cycle;
+    d.alloc_ns = g_orch_alloc_ns;
+    d.args_ns = g_orch_args_ns;
+    d.lookup_ns = g_orch_lookup_ns;
+    d.insert_ns = g_orch_insert_ns;
+    d.fanin_ns = g_orch_fanin_ns;
     d.submit_count = g_orch_submit_count;
-    d.fanin_wait_cycle = g_orch_fanin_wait_cycle;
+    d.fanin_wait_ns = g_orch_fanin_wait_ns;
     d.args_atomic_count = g_orch_args_atomic_count;
 
     // Reset
-    g_orch_alloc_cycle = g_orch_args_cycle = 0;
-    g_orch_lookup_cycle = g_orch_insert_cycle = 0;
-    g_orch_fanin_cycle = 0;
+    g_orch_alloc_ns = g_orch_args_ns = 0;
+    g_orch_lookup_ns = g_orch_insert_ns = 0;
+    g_orch_fanin_ns = 0;
     g_orch_submit_count = 0;
     g_orch_submit_idx = 0;
-    g_orch_fanin_wait_cycle = 0;
+    g_orch_fanin_wait_ns = 0;
     g_orch_args_atomic_count = 0;
     return d;
 }
diff --git a/src/common/host_build_graph/orchestrator.h b/src/common/host_build_graph/orchestrator.h
index 31935c13b9..688bc7b692 100644
--- a/src/common/host_build_graph/orchestrator.h
+++ b/src/common/host_build_graph/orchestrator.h
@@ -36,7 +36,6 @@
 #include "graph_cache.h"
 #include "host_build_graph/runtime_types.h"
 #include "host_build_graph/submit_types.h"
-#include "scheduler/scheduler.h"
 #include "host_build_graph/shared_memory.h"
 #include "host_build_graph/tensormap.h"
 #include "host_build_graph/types.h"
@@ -79,11 +78,6 @@ struct OrchestratorState {
     int32_t scope_stack_top{-1};  // Current top of stack (-1 = no scope open)
     int32_t manual_begin_depth{CHIP_MAX_SCOPE_DEPTH};
 
-    // === SCHEDULER REFERENCE ===
-    // Note: In simulated mode, orchestrator and scheduler share address space
-    // In real mode, they communicate via shared memory only
-    SchedulerState *scheduler;  // For simulated mode only
-
     // Total core counts set once at executor init; used for submit-time deadlock detection.
     int32_t total_cluster_count{0};  // AIC cores = MIX clusters
     int32_t total_aiv_count{0};      // AIV cores (= 2 × clusters on standard hardware)
@@ -155,7 +149,7 @@ struct OrchestratorState {
     //
     // Returns false when an allocation fails; the caller then has no hazard map
     // and must not orchestrate.
-    bool init(void *sm_base, void *gm_heap, uint64_t heap_size, uint64_t max_tasks, SchedulerState *scheduler);
+    bool init(void *sm_base, void *gm_heap, uint64_t heap_size, uint64_t max_tasks);
 
     void report_fatal(int32_t error_code, const char *func, const char *fmt, ...);
     void begin_scope(ScopeMode mode = ScopeMode::AUTO);
@@ -190,14 +184,14 @@ static_assert(
 
 #if SIMPLER_ORCH_PROFILING
 struct OrchProfilingData {
-    uint64_t alloc_cycle;  // Combined task slot + heap allocation
-    uint64_t args_cycle;
-    uint64_t lookup_cycle;
-    uint64_t insert_cycle;
-    uint64_t fanin_cycle;
+    uint64_t alloc_ns;  // Combined task slot + heap allocation
+    uint64_t args_ns;
+    uint64_t lookup_ns;
+    uint64_t insert_ns;
+    uint64_t fanin_ns;
     int64_t submit_count;
     // Wait time tracking for blocking phases
-    uint64_t fanin_wait_cycle;  // Legacy (wiring): fanout_lock wait; polling has no such lock
+    uint64_t fanin_wait_ns;  // Legacy (wiring): fanout_lock wait; polling has no such lock
     // Atomic operation counts per phase
     uint64_t args_atomic_count;
 };
diff --git a/tests/ut/cpp/a2a3/test_graph_activation.cpp b/tests/ut/cpp/a2a3/test_graph_activation.cpp
index 5e32b8914b..a67b57482a 100644
--- a/tests/ut/cpp/a2a3/test_graph_activation.cpp
+++ b/tests/ut/cpp/a2a3/test_graph_activation.cpp
@@ -26,6 +26,7 @@
 #include <vector>
 
 #include "utils/device_arena.h"
+#include "scheduler/scheduler.h"
 #include "host_build_graph/orchestrator.h"
 #include "host_build_graph/shared_memory.h"
 
diff --git a/tests/ut/cpp/a2a3/test_hbg_submit_poison.cpp b/tests/ut/cpp/a2a3/test_hbg_submit_poison.cpp
index a7bc6eb64c..8d974ffb72 100644
--- a/tests/ut/cpp/a2a3/test_hbg_submit_poison.cpp
+++ b/tests/ut/cpp/a2a3/test_hbg_submit_poison.cpp
@@ -32,6 +32,7 @@
 #include <vector>
 
 #include "utils/device_arena.h"
+#include "scheduler/scheduler.h"
 #include "host_build_graph/orchestrator.h"
 #include "host_build_graph/shared_memory.h"
 #include "host_build_graph/task_id.h"
@@ -67,7 +68,7 @@ class HbgSubmitPoisonTest : public ::testing::Test {
         // Same order the AICPU boots in: the slot arrays are not part of the
         // uploaded image, so nothing can push until they carry their ramp.
         sched.seed_queue_slots();
-        ASSERT_TRUE(orch.init(sm_handle->sm_base, gm_heap.data(), 4096, CHIP_DEFAULT_GRAPH_TASKS, &sched));
+        ASSERT_TRUE(orch.init(sm_handle->sm_base, gm_heap.data(), 4096, CHIP_DEFAULT_GRAPH_TASKS));
     }
 
     void TearDown() override {
diff --git a/tests/ut/cpp/a5/test_graph_activation.cpp b/tests/ut/cpp/a5/test_graph_activation.cpp
index 5e32b8914b..a67b57482a 100644
--- a/tests/ut/cpp/a5/test_graph_activation.cpp
+++ b/tests/ut/cpp/a5/test_graph_activation.cpp
@@ -26,6 +26,7 @@
 #include <vector>
 
 #include "utils/device_arena.h"
+#include "scheduler/scheduler.h"
 #include "host_build_graph/orchestrator.h"
 #include "host_build_graph/shared_memory.h"
 
diff --git a/tests/ut/cpp/a5/test_hbg_submit_poison.cpp b/tests/ut/cpp/a5/test_hbg_submit_poison.cpp
index 5f0cdb7190..71a0048a3d 100644
--- a/tests/ut/cpp/a5/test_hbg_submit_poison.cpp
+++ b/tests/ut/cpp/a5/test_hbg_submit_poison.cpp
@@ -31,6 +31,7 @@
 #include <vector>
 
 #include "utils/device_arena.h"
+#include "scheduler/scheduler.h"
 #include "host_build_graph/orchestrator.h"
 #include "host_build_graph/shared_memory.h"
 #include "host_build_graph/task_id.h"
@@ -66,7 +67,7 @@ class HbgSubmitPoisonTest : public ::testing::Test {
         // Same order the AICPU boots in: the slot arrays are not part of the
         // uploaded image, so nothing can push until they carry their ramp.
         sched.seed_queue_slots();
-        ASSERT_TRUE(orch.init(sm_handle->sm_base, gm_heap.data(), 4096, CHIP_DEFAULT_GRAPH_TASKS, &sched));
+        ASSERT_TRUE(orch.init(sm_handle->sm_base, gm_heap.data(), 4096, CHIP_DEFAULT_GRAPH_TASKS));
     }
 
     void TearDown() override {
diff --git a/tests/ut/cpp/common/test_hbg_graph_definition_arena.cpp b/tests/ut/cpp/common/test_hbg_graph_definition_arena.cpp
index 4fa2ef9ea8..dbe8efcb96 100644
--- a/tests/ut/cpp/common/test_hbg_graph_definition_arena.cpp
+++ b/tests/ut/cpp/common/test_hbg_graph_definition_arena.cpp
@@ -33,6 +33,7 @@
 
 #include "graph_execution.h"
 #include "graph_host_state.h"
+#include "scheduler/scheduler.h"
 #include "host_build_graph/orchestrator.h"
 #include "host_build_graph/shared_memory.h"
 #include "utils/device_arena.h"
@@ -62,7 +63,7 @@ class HbgGraphDefinitionArenaTest : public ::testing::Test {
 
         ASSERT_TRUE(sched.init_data_from_layout(sched_layout, runtime_arena, sm_handle->sm_base));
         sched.wire_arena_pointers(sched_layout, runtime_arena);
-        ASSERT_TRUE(orch.init(sm_handle->sm_base, gm_heap.data(), HEAP_BYTES, CHIP_DEFAULT_GRAPH_TASKS, &sched));
+        ASSERT_TRUE(orch.init(sm_handle->sm_base, gm_heap.data(), HEAP_BYTES, CHIP_DEFAULT_GRAPH_TASKS));
     }
 
     void TearDown() override {
diff --git a/tests/ut/cpp/common/test_hbg_graph_recording_bounds.cpp b/tests/ut/cpp/common/test_hbg_graph_recording_bounds.cpp
index c28b222be3..6325ab0b50 100644
--- a/tests/ut/cpp/common/test_hbg_graph_recording_bounds.cpp
+++ b/tests/ut/cpp/common/test_hbg_graph_recording_bounds.cpp
@@ -28,6 +28,7 @@
 
 #include "graph_execution.h"
 #include "graph_host_state.h"
+#include "scheduler/scheduler.h"
 #include "host_build_graph/orchestrator.h"
 #include "host_build_graph/shared_memory.h"
 #include "utils/device_arena.h"
@@ -58,7 +59,7 @@ class HbgGraphRecordingBoundsTest : public ::testing::Test {
 
         ASSERT_TRUE(sched.init_data_from_layout(sched_layout, runtime_arena, sm_handle->sm_base));
         sched.wire_arena_pointers(sched_layout, runtime_arena);
-        ASSERT_TRUE(orch.init(sm_handle->sm_base, gm_heap.data(), HEAP_BYTES, CHIP_DEFAULT_GRAPH_TASKS, &sched));
+        ASSERT_TRUE(orch.init(sm_handle->sm_base, gm_heap.data(), HEAP_BYTES, CHIP_DEFAULT_GRAPH_TASKS));
 
         definition_staging.assign(STAGING_BYTES, std::byte{0});
         GraphDefinitionArena arena{};
diff --git a/tests/ut/cpp/common/test_hbg_graph_submit_failure.cpp b/tests/ut/cpp/common/test_hbg_graph_submit_failure.cpp
index 4b22a7992c..cf8200df42 100644
--- a/tests/ut/cpp/common/test_hbg_graph_submit_failure.cpp
+++ b/tests/ut/cpp/common/test_hbg_graph_submit_failure.cpp
@@ -24,6 +24,7 @@
 
 #include "graph_execution.h"
 #include "graph_host_state.h"
+#include "scheduler/scheduler.h"
 #include "host_build_graph/orchestrator.h"
 #include "host_build_graph/shared_memory.h"
 #include "task_interface/assert_compat.h"
@@ -72,7 +73,7 @@ class HbgGraphSubmitFailureTest : public ::testing::Test {
 
         ASSERT_TRUE(sched.init_data_from_layout(sched_layout, runtime_arena, sm_handle->sm_base));
         sched.wire_arena_pointers(sched_layout, runtime_arena);
-        ASSERT_TRUE(orch.init(sm_handle->sm_base, gm_heap.data(), HEAP_BYTES, CHIP_DEFAULT_GRAPH_TASKS, &sched));
+        ASSERT_TRUE(orch.init(sm_handle->sm_base, gm_heap.data(), HEAP_BYTES, CHIP_DEFAULT_GRAPH_TASKS));
 
         definition_staging.assign(STAGING_BYTES, std::byte{0});
         arena.base = definition_staging.data();
diff --git a/tests/ut/cpp/common/test_hbg_slot_claim.cpp b/tests/ut/cpp/common/test_hbg_slot_claim.cpp
index 7c4608fed6..4c04b0246d 100644
--- a/tests/ut/cpp/common/test_hbg_slot_claim.cpp
+++ b/tests/ut/cpp/common/test_hbg_slot_claim.cpp
@@ -24,6 +24,7 @@
 
 #include "graph_execution.h"
 #include "graph_host_state.h"
+#include "scheduler/scheduler.h"
 #include "host_build_graph/orchestrator.h"
 #include "host_build_graph/shared_memory.h"
 #include "utils/device_arena.h"
@@ -56,7 +57,7 @@ class HbgSlotClaimTest : public ::testing::Test {
 
         ASSERT_TRUE(sched.init_data_from_layout(sched_layout, runtime_arena, sm_handle->sm_base));
         sched.wire_arena_pointers(sched_layout, runtime_arena);
-        ASSERT_TRUE(orch.init(sm_handle->sm_base, gm_heap.data(), HEAP_BYTES, CHIP_DEFAULT_GRAPH_TASKS, &sched));
+        ASSERT_TRUE(orch.init(sm_handle->sm_base, gm_heap.data(), HEAP_BYTES, CHIP_DEFAULT_GRAPH_TASKS));
 
         definition_staging.assign(STAGING_BYTES, std::byte{0});
         GraphDefinitionArena arena{};