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Move HRX pin: hrx-system to 2ab311496 (engine#420 length-less ELF readability fix) - #443
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…dability fix) 2ab311496 is 1bit-MONSTER/hrx-system PR #7 on today's pin line (1bit/e3e6a976-pin-6): the length-less hipModuleLoadData path derives its extent from the ELF header and checked the span with mincore(), which reports a mapped-but-unreadable (PROT_NONE) page as present, so a header whose e_shoff points into one passed the check and the table read faulted. The probe is now process_vm_readv(), one byte per spanned page, so unreadable spans are rejected with INVALID_ARGUMENT before any table is read. The changed path is only the length-less branch; loads that carry a length (which is what the HRX ggml backend does) never reach it. config/hrx-long-prompt-validated-pin.config moves with it, as check_pins.py requires for an hrx-system pin move. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
PR Reviewer Guide 🔍(Review updated until commit 929555c)Here are some key observations to aid the review process:
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…es with the gitlink The guard compares third_party/hrx-system with this file, and the pin move needs both. The commit is the same held line (d3c731e1 + hrx-system#7), so the durable-hold reasoning and the ROCm/hrx-system#1535 question are unchanged. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Persistent review updated to latest commit 929555c |
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Also fixed in this PR: the |
Move HRX pin:
third_party/hrx-systemd3c731e1->2ab311496, which is 1bit-MONSTER/hrx-system#7 on today's pin line (1bit/e3e6a976-pin-6).Fixes #420. That issue's crash is not in the AMDGPU HAL on this line:
hsaco_metadata.calready bounds-checks every read againstdata_length. The surviving defect is the length-less path inlibhrx/src/binding/common/fat_binary.c:hipModuleLoadDatacarries no image length, so the extent is derived from the ELF header's own table geometry and was then proved withmincore().mincore()reports that a mapping covers a page, not that the page is readable, so a header whosee_shoff/e_phoffpoints into aPROT_NONEguard page passed the proof and the table read faulted iniree_hal_streaming_fat_binary_describe_amdgpu_elf.The fork PR replaces the proof with
process_vm_readv()over one byte per spanned page, which goes through the same access checks a real read does and fails withEFAULTon the first unreadable page, so the span is rejected withINVALID_ARGUMENTbefore any table is dereferenced. Only the length-less branch changes; loads that carry a length, which is what the HRX ggml backend does, never reach it. The fork PR also adds the regression testRejectsLengthlessElfSpanningUnreadablePageand reports the crafted-header repro: SIGSEGV/exit 139 before, HIP error 200/exit 0 after, with a real gfx1151 code object still loading throughhipModuleLoadData.config/hrx-long-prompt-validated-pin.configmoves with the pin, astools/check_pins.pyrequires for an hrx-system pin move.Verification at this pin:
tools/check_pins.py origin/main:ok third_party/hrx-system: d3c731e1d -> 2ab311496 is ahead.-DONEBIT_HRX=ONagainst this pin;tests/hrx_long_prompt.py(Qwen3-0.6B multi-ubatch retrieval, needle 7341) PASS twice on strixhalo gfx1151:PASS 7082-token prompt: expected 7341, got '7341'.fat_binary_test, 16/16 with the new case) and its crafted-header repro are in [HIP] Prove length-less ELF extents readable, not just mapped (engine#420) hrx-system#7.Merge order: 1bit-MONSTER/hrx-system#7 first, then this pin move. Both are linked from #420.
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