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Pin gpu-kernels fcf526ea: jina attention (G10), softmax sinks fix, startup ABI check - census 43/43 on HRX - #481
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…PU token (#484) Three late-caught bugs of 2026-10-20 (gpu-kernels #11, #14) passed this gate. It now covers the paths they broke: - MODEL_TABLE takes a fifth column of llama-server arguments. Two new rows serve Qwen3-0.6B with -fa on -ctk q8_0 (V f16) and with -ctk q8_0 -ctv q8_0, with kat and the 7.1K-token needle. Their long prompts decode past 1,024 KV cells, where the add-on's split decode kernel fa_decode_q8_d128 takes over. Rows with server arguments skip kld (the bases are recorded per model file, f16 cache). Goldens recorded with the private kernels (gpu-kernels 449a809e, this pin): kat-qwen3-0.6b-kq8.json and kat-qwen3-0.6b-kvq8.json; both miss varied-720w ("25") exactly as the f16 golden does. - The ops phase runs the add-on's ggml-hrx-fa-decode-bench on fa_decode_q8_d128 with V f16 and V q8_0 (Hq/Hkv 16/8 and 32/8, n_kv 1031/2048/4103) against its double-precision reference; the build adds that target when the add-on is in. test-backend-ops has no FLASH_ATTN_EXT case with K and V of different types. - The gate takes ~/GPU-TOKEN before its first GPU step: it waits up to HW_GATE_TOKEN_WAIT s (3600) logging the holder, writes "hw-gate [run N] pid P <time>", removes it on exit only if the content is still its own, and fails with exit 2 naming the holder on timeout. Two #481 gate runs died "server failed (rc 137)" while Hyperloom held the token. HW_GATE_TOKEN=none skips it. Measured on strixhalo, performance mode: - token: a fake holder with HW_GATE_TOKEN_WAIT=15 gives "gpu-token FAIL", exit 2; the recording run waited 960 s for Hyperloom's token, took it, released it - fa-decode-q8: 6/6 PASS, NMSE 1.3e-13 to 2.3e-13, 5 repeats bit-identical Co-authored-by: bong-water-water-bong <bong-water-water-bong@1bit.gg> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
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…nside Lemonade) (#488) - README: lead with the census (43/43 on the GPU, #476/#480/#481) and Qwen3.8-27B MTP 36.0/26.8/29.9 tok/s (#487); one hop (#475), strict placement (#482), hw-gate kernels and placement (#478/#484), allocation safety (#486), Ubuntu 26.04 PPA lemond (#483), ONNX on the NPU via the user's Ryzen AI install (#386); Vulkan/ROCm/CUDA/ZINC/ComfyUI/MLX/Windows cut (#306); no release date; NPU in progress with no speed numbers. - npu.md: a status page with the public parts only (model format, serving, add-on hook, build); no runtime method, no NPU speeds. - releases.md: "Releases", first release when the checklist is done; neutral package checks. - lemonade.md, serve.md, hrx.md, laya.md, PORTING.md, registry.md: one hop, MTP on HRX (#487), census lead, add-on wording without private repository names or NPU speeds. Co-authored-by: bong-water-water-bong <bong-water-water-bong@1bit.gg> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
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Pins gpu-kernels #14 (strided batched matmul + ALiBi softmax for jina-bert). With it, the 20 Oct HRX census closes: 43 of 43 runnable cells (chat, long, q8 KV, --parallel 4, MTP, embedding, rerank across Qwen3 0.6B/4B, LFM2, MiniCPM, ZAYA, Coder-30B, GLM, Qwen3.8-27B, nomic, jina, bge) with 0 nodes off HRX, 1 graph split, every request answered (pi goal mvgdshw8, evidence strixhalo ~/wt/HRX-GAPS-PROGRESS.md). The hw-gate label builds our kernels and runs the full gate; merged by hand after it passes.
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