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docs(onnx-pack): where the numbers live points at the tree, not a private state file - #685

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Oct 31, 2026
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Owner read https://1bit.gg/onnx-pack.html today. The section after "what the pack does not do" told a public reader that the device measurements live in ~/briefs/TORTEP-STATE.md, a lane state file on our boxes. The numbers are public in the tree since #683 and #647, so the paragraph now links onnx/BENCHMARK-PARITY.md (CPU rows, NPU row with the AMD model_benchmark protocol) and docs/onnx.md (the EP proof).

Docs only. The stale "No KV cache" wording the owner saw on the live page was the site's build schedule, not the docs: 1bit.gg was last built at 05:36 UTC, before #684 merged; a pages run was dispatched and the live page now shows the opt-in KV cache paragraph.

🤖 Generated with Claude Code

…ivate state file

The paragraph sent public readers to ~/briefs/TORTEP-STATE.md, a lane file that
only exists on our boxes. The numbers are in onnx/BENCHMARK-PARITY.md (#683) and
docs/onnx.md (#647); link those.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>

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VERDICT: READY (tprs-ready applied). The private-path pointer is gone, both replacement links resolve, and the one number in the new paragraph is supported by the page it points at. Two small precision notes.

  • No private path left in docs/onnx-pack.md at this head (grep -nE "~/|/home/|briefs|TORTEP" → nothing). That was the whole point: a public page was telling a reader to look in ~/briefs/TORTEP-STATE.md.
  • Both links resolve: ../onnx/BENCHMARK-PARITY.md → onnx/BENCHMARK-PARITY.md (present on main since #683, 201 lines: the AMD protocol, the two --cached CPU tables, and the ## NPU row: our engine, the dx route section "driven by onnx/bench_npu.sh" — which exists), and onnx.md → docs/onnx.md.
  • "within 0.5 %" is supported by the page it links. docs/onnx.md's Status section records the device proof as max_abs = 9.893e-02 against max|ref| = 20.414, i.e. rel 4.846e-03 against a 2e-2 gate — 0.48 %, which is the 0.5 % claimed. The two are consistent; they are just in different forms.

Note 1 (precision): "the CPU rows (ryzen and Strix Halo, five prompt lengths, default and --cached exports)". BENCHMARK-PARITY's tables are --cached rows only — the default/uncached comparison lives in onnx/README.md (uncached 291.22 ms/token vs --cached 63.66, 4.6x at 256 tokens). Either say "the --cached rows" here, or name both files.

Note 2 (precision, so the number does not drift): the page states the tolerance as rel 4.846e-03 and the paragraph states "0.5 %". Both are right; anyone re-deriving will want the pair tied together, e.g. "within 0.5 % (rel 4.8e-03 on the reference shape)". Not a blocker.

No numbers were changed or added beyond that one, the diff is a single paragraph (+6/−3), and the stale "No KV cache" the owner saw on the live page is a site build-schedule artefact, as the body says — 1bit.gg was last built at 05:36Z, before #684 merged.

@bong-water-water-bong bong-water-water-bong added the tprs-ready TPRS: review verdict READY posted by the standing reviewer; merge gate satisfied label Oct 31, 2026
@bong-water-water-bong
bong-water-water-bong merged commit dcba323 into main Oct 31, 2026
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bong-water-water-bong deleted the docs/onnx-pack-numbers branch October 31, 2026 10:27
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