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[Feature Request] Support for Q4 / Q5 / Q6 quantizations (e.g. Unsloth's UD-Q4_K_XL to UD-Q6_K_XL) #222
Currently, Strata primarily supports Q2_0, IQ2_XS, IQ3_XXS, and IQ3_S quantizations to fit within standard consumer setups (~64GB RAM + 12-24GB VRAM).
Would it be possible to add support for higher-precision quantizations, such as Q4 through Q6 models (e.g., Unsloth's UD-Q4_K_XL to UD-Q6_K_XL for Qwen3.8-Flash-Next: https://huggingface.co/unsloth/Qwen3.8-Flash-Next-GGUF)?
Motivation & Context
For users who have workstations or PCs with larger RAM pools (e.g., 96GB–128GB+ RAM) or multi-GPU setups (e.g., dual 3090/4090), running Q4/Q5/Q6 would provide noticeably higher reasoning quality and lower perplexity compared to IQ3/Q2.
Questions:
Is supporting Q4+ (or unsloth dynamic/custom quants like UD-Q4_K_XL) on the roadmap?
What are the main blockers for higher-bit quant support? (e.g., shard packing format/conversions in ref/tools, ggml tensor type implementations, or CPU-RAM offloading throughput bottlenecks?)
Is there a guide or manual conversion workflow to pack and test custom GGUF quants directly with Strata?
Thank you for this incredible project!
Reacted by Christoph Wübbels, TkskKurumi and Lukas Siemon
Thanks. It's not on the roadmap: Strata targets 64 GB PCs, and the GSQ-RCO IQ3_S already matches the full BF16 model on the published benchmarks, so a Q4-Q6 file (well over 100 GB) would cost a lot of RAM for little gain. The engine does have kernels for Q4_K/Q5_K/Q6_K, so a GGUF of this architecture may load with --gguf-dir if each layer's gate/up/down tensors sit in one shard (see #171) and the PLE shard and tensor names match, but that is untested and unsupported. Closing as not planned.
Activity
Niko1221 commentedon Sep 30, 2026
Thanks. It's not on the roadmap: Strata targets 64 GB PCs, and the GSQ-RCO IQ3_S already matches the full BF16 model on the published benchmarks, so a Q4-Q6 file (well over 100 GB) would cost a lot of RAM for little gain. The engine does have kernels for Q4_K/Q5_K/Q6_K, so a GGUF of this architecture may load with
--gguf-dirif each layer's gate/up/down tensors sit in one shard (see #171) and the PLE shard and tensor names match, but that is untested and unsupported. Closing as not planned.native experts: Q5_0 GPU kernel (#222)
Merge main into feature/rdna3-support
hip: pass the GPU suite on gfx1101 (RX 7700 XT)
native experts: Q4_0 and Q4_1 GPU kernels, Q4_0 PLE table
native experts: Q5_0 GPU kernel (#222)
native experts: Q4_0 and Q4_1 GPU kernels, Q4_0 PLE table
native experts: Q5_0 GPU kernel (Niko1221#222)
native experts: Q4_0 and Q4_1 GPU kernels, Q4_0 PLE table
native experts: Q5_0 GPU kernel (Niko1221#222)
native experts: Q4_0 and Q4_1 GPU kernels, Q4_0 PLE table