Skip to content

[release/2.15] Fix inline asm elementwise tests for real-true16 on gfx1250 (#3862) - #3968

Open
BLOrange-AMD wants to merge 1 commit into
release/2.15from
bl/fix-inline-asm-true16-gfx1250-2.15
Open

BLOrange-AMD wants to merge 1 commit into
release/2.15from
bl/fix-inline-asm-true16-gfx1250-2.15

Conversation

@BLOrange-AMD

Copy link
Copy Markdown

This PR fixes:

higher_order_ops/test_inline_asm_elementwise.py::TestInlineAsmElementwise::test_eager_vs_compiled_bitwise_truncate_to_uint16

higher_order_ops/test_inline_asm_elementwise.py::TestInlineAsmElementwise::test_eager_vs_compiled_bitwise_add_fp16_native

higher_order_ops/test_inline_asm_elementwise.py::TestInlineAsmElementwise::test_eager_vs_compiled_bitwise_add_bf16_native

Through PR, gfx1250 enables LLVM's real-true16 feature.

  • So in PyTorch, need to add gfx1250 to a real-true16 code path, align with Navi3/3.5/4 in TRUE16_ARCH. This fixes add_fp16_native and truncate_to_uint16, whose existing real-true16 sequences assemble unchanged on gfx1250.

  • add_bf16_native gets its own real-true16 variant. It never needed one before because it is skipped on every previously-listed true16 arch (v_cvt_pk_bf16_f32 requires gfx950+), so gfx1250 is the first real-true16 arch where it actually runs. The new sequence does the add and the pack into physical v0, declared as a clobber, then copies the packed low half into the true16 output with v_mov_b16 $0, v0.l. Writing the packed result into $0 directly does not work either — v_cvt_pk_bf16_f32 rejects a 16-bit destination too.

…x1250 (#3862)

This PR fixes:

higher_order_ops/test_inline_asm_elementwise.py::TestInlineAsmElementwise::test_eager_vs_compiled_bitwise_truncate_to_uint16

higher_order_ops/test_inline_asm_elementwise.py::TestInlineAsmElementwise::test_eager_vs_compiled_bitwise_add_fp16_native

higher_order_ops/test_inline_asm_elementwise.py::TestInlineAsmElementwise::test_eager_vs_compiled_bitwise_add_bf16_native

Through [PR](llvm/llvm-project#190452), gfx1250
enables LLVM's real-true16 feature.

- So in PyTorch, need to add gfx1250 to a real-true16 code path, align
with Navi3/3.5/4 in TRUE16_ARCH. This fixes add_fp16_native and
truncate_to_uint16, whose existing real-true16 sequences assemble
unchanged on gfx1250.

- add_bf16_native gets its own real-true16 variant. It never needed one
before because it is skipped on every previously-listed true16 arch
(v_cvt_pk_bf16_f32 requires gfx950+), so gfx1250 is the first
real-true16 arch where it actually runs. The new sequence does the add
and the pack into physical v0, declared as a clobber, then copies the
packed low half into the true16 output with v_mov_b16 $0, v0.l. Writing
the packed result into $0 directly does not work either —
v_cvt_pk_bf16_f32 rejects a 16-bit destination too.

---------

Co-authored-by: Cursor Agent <cursoragent@cursor.com>
Co-authored-by: Bo Li <BLOrange-AMD@users.noreply.github.com>
Co-authored-by: Prachi Gupta <pracgupt@amd.com>
@BLOrange-AMD BLOrange-AMD changed the title [release/2.14] Fix inline asm elementwise tests for real-true16 on gfx1250 (#3862) [release/2.15] Fix inline asm elementwise tests for real-true16 on gfx1250 (#3862) Nov 6, 2026

This branch has not been deployed

No deployments
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant