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Support compsd Pseudo-Op #4024

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@ndrewh

This is really nitpicky and rarely an issue, but for the CMPSD instruction (note there are two -- I'm talking about the floating-point comparison one), binja is lifting to a 3-operand intrinisic _mm_cmpeq_sd. This is misleading because the third operand determines the comparison condition (It is sometimes cmpeq_sd, but only when the third operand is 0). https://www.felixcloutier.com/x86/cmpsd

https://github.com/Vector35/arch-x86/blob/46061eb65bdc9cd7eddd6f400376895534d61f99/arch_x86_intrinsics.cpp#L4730-L4731

000da6f6  f20fc2d806         cmpsd   xmm3, xmm0, 0x6

lifts to

_mm_cmpeq_sd(zmm1.q, zmm0.q, 6)

But the condition for this instruction is actually NLE rather than EQ. Capstone gives

0x0000000000000000:  F2 0F C2 D8 06    cmpnlesd xmm3, xmm0

which would also be an improvement. But the dream would be if these just lifted to proper floating point operations in IR rather than intrinsics :)

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Arch: x86Issues with the x86/x64 architecture pluginComponent: ArchitectureIssue needs changes to an architecture pluginEffort: LowIssues require < 1 week of workImpact: LowIssue is a papercut or has a good, supported workaround

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