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…PG Plus (1/3, Xe1-ARLH) Co-authored-by: Xia, Jie <jie.xia@intel.com> Co-authored-by: Liu, Russell <russell.liu@intel.com>
…G Plus/Xe2/Xe3) Co-authored-by: Xia, Jie <jie.xia@intel.com> Co-authored-by: Liu, Russell <russell.liu@intel.com>
…n for Intel MoE path (3/3, Xe-LPG Plus/Xe2/Xe3) Co-authored-by: Xia, Jie <jie.xia@intel.com> Co-authored-by: Liu, Russell <russell.liu@intel.com>
…, refine Vulkan host code for temp buffer reuse and thread lock
XanderSC
marked this pull request as draft
August 4, 2026 02:18
XanderSC
marked this pull request as ready for review
August 4, 2026 02:18
XanderSC
marked this pull request as draft
August 4, 2026 02:28
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Overview
Attempting merge of master PR24408 into forked llama.cpp for enhanced Vulkan performance, specifically from Xe flash attention + including GEMM optimizations on Xe2/Xe3.
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