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Model register usage for write-barriers on x64 more precisely #128720

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@EgorBo

Context: #128687 (comment)

Minimal example:

public sealed class Node { public object? Next; }

public static class Demo
{
    [MethodImpl(MethodImplOptions.NoInlining)]
    public static Vector256<double> Loop(Node[] nodes, object val)
    {
        Vector256<double> acc = Vector256<double>.Zero;
        Vector256<double> one = Vector256.Create(1.0);
        for (int i = 0; i < nodes.Length; i++)
        {
            acc += one;            // loop-carried 256-bit FP accumulator
            nodes[i].Next = val;   // <-- GC-ref store ⇒ CORINFO_HELP_ASSIGN_REF (write barrier)
        }
        return acc;
    }
}

e.g. on windows we end up with

vmovaps  xmmword ptr [rsp], xmm6
...
vmovaps  xmm6, xmmword ptr [rsp]

but the write-barrier never touches xmm6

Activity

  1. self-assigned this
    on May 28, 2026
  2. added this to the 11.0.0 milestone on May 28, 2026
  3. added
    area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
    on May 28, 2026
  4. dotnet-policy-service commented on May 28, 2026

    @dotnet-policy-service
    Contributor

    Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch
    See info in area-owners.md if you want to be subscribed.

  5. EgorBo commented on Jun 2, 2026

    @EgorBo
    MemberAuthor

    Fixed in main

  6. locked and limited conversation to collaborators on Jul 3, 2026
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