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Arm64 SVE: Support scalable constant vectors and masks - #127520

Merged

dhartglassMSFT merged 94 commits into

dotnet:mainfrom

a74nh:truemasknode_github

Jul 28, 2026

Commits on Apr 29, 2026
- Arm64 SVE: Support scalable constant vectors and masks
  a74nh
  committed
  7fac1f9
Commits on Apr 30, 2026
- Merge branch 'main' into truemasknode_github
  jakobbotsch
  authored
  71dd4f4
- Fix AllBitsSet functionality
  a74nh
  committed
  c3afbc8
- Remove duplicate loadConstantHelper
  a74nh
  committed
  fd84125
- Remove extra break
  a74nh
  committed
  43f648b
- Ensure index and step have distinct temp registers
  a74nh
  committed
  d6a99e1
- fix formatting
  a74nh
  committed
  e04c472
- Fix GetHashCode for scalables
  a74nh
  committed
  91d235c
- Fix IsTrueMask logic
  a74nh
  committed
  7c7ebbd
- Fix IsTrueMask logic
  a74nh
  committed
  cec1eb0
- Reserve correct registers for constant vectors
  a74nh
  committed
  183bc23
- Canonicalize for simdscalable_t zero
  a74nh
  committed
  160810c
- Check all bits when converting to/from vector/mask
  a74nh
  committed
  168b84d
Commits on May 1, 2026
- fix call to AllBitsSet
  a74nh
  committed
  6c46277
- Fix codegen for SimdScalableScalar floats
  a74nh
  committed
  7c02f28
- use memcpy for getting floats
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  committed
  1c5bf92
- Add debug check
  a74nh
  committed
  3a3e1d3
- Add VN support for scalable+fixed masks
  a74nh
  committed
  490bec7
- set step to 0 in EvaluateSimdCvtScalableMaskToVector
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  committed
  b8d75a2
- formatting
  a74nh
  committed
  170665e
- Add assert to GetConstantSimdMask
  a74nh
  committed
  319f7bd
- fix FEATURE_MASKED_HW_INTRINSICS defines
  a74nh
  committed
  064feae
Commits on May 14, 2026
- Better float support for sequence nodes
  a74nh
  committed
  1be5041
Commits on May 15, 2026
- merge main
  a74nh
  committed
  ddfc802
- Fix use of simdmaskvalue_t
  a74nh
  committed
  9ba8e2e
- Fix constants codegen
  a74nh
  committed
  bf01233
- generate true mask with FFs
  a74nh
  committed
  d34c1e6
- Special case zero in valuenum
  a74nh
  committed
  c3dfe81
- Fix codegen casting
  a74nh
  committed
  9897c97
- handle large bits in isValidSimm
  a74nh
  committed
  691aaef
- Remove redundant ifdef
  a74nh
  committed
  f24b950
- Copy floats
  a74nh
  committed
  f1cefa5
- document gtSimdMaskScalableIndex
  a74nh
  committed
  d7f5ac0
- initialise index in BroadcastConstantToSimdScalable
  a74nh
  committed
  f6ee722
Commits on May 18, 2026
- match lsra to codegen
  a74nh
  committed
  bd26a42
- initialise canEncodeScalar
  a74nh
  committed
  ff17281
- Check for invalid index in EvaluateSimdCvtScalableMaskToVector
  a74nh
  committed
  7af9cee
- Use data version of gtNewVconNode
  a74nh
  committed
  e5f9829
- allow default option in lsra switch
  a74nh
  committed
  878ea9d
- initialise step in BroadcastConstantToSimdScalable
  a74nh
  committed
  c177772
- noway assert in GetConstantSimdMask
  a74nh
  committed
  024a8e3
Commits on May 19, 2026
- Call overload gtNewMskConNode from gtNewMskConNode
  a74nh
  committed
  4d639e4
Commits on May 28, 2026
- Make VN isScalable Arm64 only
  a74nh
  committed
  adb6b9f
- Do not canonicalize zeros for gtHashValue
  a74nh
  committed
  3a2a6f5
- bool type for isScalable
  a74nh
  committed
  bc7b44f
- Remove config check when printing valuenum constants
  a74nh
  committed
  8d69cc9
Commits on May 29, 2026
- copy simdval directly in valuenu
  a74nh
  committed
  b856d31
- split out scalable printing
  a74nh
  committed
  0e96535
- fix immediate extraction in codegen
  a74nh
  committed
  2a39849
- merge main
  a74nh
  committed
  8a345ee
Commits on Jun 1, 2026
- formatting
  a74nh
  committed
  09f2165
- duplicate uint64_t checks in lsra
  a74nh
  committed
  11c506d
- const param for gtNewSimdVconNode
  a74nh
  committed
  0e728dc
Commits on Jun 4, 2026
- Add simdscalable_t Zero()
  a74nh
  committed
  c97f62f
- Add TYP_SIMD for EvaluateUnaryInPlace
  a74nh
  committed
  8b03d4b
- Add codegen for zero and allbits in constant codegen
  a74nh
  committed
  4b19e65
- add additional TYP_SIMD checks
  a74nh
  committed
  dd6caa6
- fix VectorT create for floats
  a74nh
  committed
  f251de1
- merge main
  a74nh
  committed
  a728af2
- TYP_SIMD is Arm64 only
  a74nh
  committed
  00c8558
- don't use C++20
  a74nh
  committed
  88265cb
- Add valuenum casting
  a74nh
  committed
  5d92597
Commits on Jun 10, 2026
- merge main
  a74nh
  committed
  aa2359a
- rename index and step
  a74nh
  committed
  424e533
- remove pointless assert
  a74nh
  committed
  841f185
- rename index to element
  a74nh
  committed
  90df4c1
- remove comment
  a74nh
  committed
  bb71e96
- move zero and allbits check
  a74nh
  committed
  1e693d6
- formatting
  a74nh
  committed
  9d35102
- Commonise constant extraction logic
  a74nh
  committed
  7f262be
- simplify TryEvaluateUnarySimdScalable
  a74nh
  committed
  fdfbb76
- expand doc header
  a74nh
  committed
  d8803e5
- fix callsites to EvaluateUnaryInPlace
  a74nh
  committed
  5cf2e24
Commits on Jun 11, 2026
- Spread usage of simdmaskvalue_t in valuenum.cpp
  a74nh
  committed
  b377e01
- Move comment block
  a74nh
  committed
  be2017f
- Add SimdAllBitsSetForElementType helper
  a74nh
  committed
  47a4e1b
- remove comment
  a74nh
  committed
  5a794d6
- rename EvaluateUnaryInPlace to TryEvaluateUnaryInPlace
  a74nh
  committed
  14caab9
- add comment
  a74nh
  committed
  8678cdf
Commits on Jun 18, 2026
- merge main
  a74nh
  committed
  916034f
Commits on Jun 26, 2026
- merge main
  a74nh
  committed
  ed7f945
- Fix codegen of SimdScalableScalar for integrals
  a74nh
  committed
  8e7d520
- Fix gtDispConst element printing
  a74nh
  committed
  9efd66f
- formatting
  a74nh
  committed
  eae59e5
- fix gtNewSimdGetIndicesNode for floating
  a74nh
  committed
  b51118b
- Mask the type size in gtNewSimdVconNode
  a74nh
  committed
  812a860
- formatting
  a74nh
  committed
  ed2db71
Commits on Jul 2, 2026
- merge main
  a74nh
  committed
  da628ad
Commits on Jul 6, 2026
- merge main
  a74nh
  committed
  a7f17a7
Commits on Jul 23, 2026
- merge main
  a74nh
  committed
  75b6786
- scale integrals using SimdAllBitsSetForElementType
  a74nh
  committed
  f426f90
Commits on Jul 24, 2026
- fix EvaluateSimdCvtScalableVectorToMask
  a74nh
  committed
  4bbbcb5
- fix genTypeSize uses for TYP_SIMD
  a74nh
  committed
  7bd27b6
Commits on Jul 27, 2026
- Add scalable mask section in fgValueNumberTreeConst
  a74nh
  committed
  1e74bae

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