[APX] Add Jmpabs support.

[DeepakRajendrakumaran]

Add JMPABS (APX) Support for Virtual Call Stubs on AMD64

Summary

This PR adds support for the JMPABS instruction (part of Intel's APX - Advanced Performance Extensions) to virtual call stubs on AMD64, reducing stub size and improving instruction fetch efficiency.

Background

APX introduces the JMPABS instruction (D5 00 A1 + 8-byte address), which performs a 64-bit absolute jump. JMPABS provides performance benefits over the traditional mov rax, imm64; jmp rax sequence:

Virtual call stubs are small code sequences generated at runtime for dispatching interface and virtual method calls. Currently, these stubs use a two-instruction sequence (mov rax, target; jmp rax) to perform 64-bit absolute jumps.

Changes

Virtual Call Stub Infrastructure

Stub Generation Helpers (src/coreclr/vm/amd64/cgenamd64.cpp, cgencpu.h)

• Added emitJmpAbsJump() helper function to emit raw JMPABS instructions (11 bytes)
• Modified emitBackToBackJump() to use JMPABS encoding when available, with fallback to legacy encoding
• Extend AMD64 virtual call short dispatch stubs to support an APX encoding path (jne rel32; nop; jmpabs imm64) and use it when APX is available.
• Added IsJmpAbsAvailable() CPU capability detection function
• Removed dead code: EncodeLoadAndJumpThunk() (obsolete thunk generation helper)
• Fixed DispatchStubShort_offsetof_failDisplBase macro referencing wrong struct type (DispatchStubLong → DispatchStubShort)

Testing

1. JIT Emitter Unit Tests: Ran unit tests to verify JMPABS instruction encoding in the JIT emitter
2. Library Tests: Ran library tests with APX enabled/disabled to verify stub changes cause no failures on non-APX hardware
3. Runtime Tests: Ran src/tests with and without APX to validate stub changes on non-APX hardware

Issue

Fixes #131817

JIT Emitter

src/coreclr/jit/emitxarch.cpp

• Added JMPABS instruction encoding support in the emitter
• Added unit test for JMPABS encoding
• Note: JMPABS is not currently used anywhere in the JIT itself

Edit - the emitter changes have been reveretd based on feedback from @jkotas

Opens

1. Static Stub Size with NOP Padding

Current approach: To maintain consistent stub size and simplify stub management, this PR uses NOP padding in the APX encoding path:

emitBackToBackJump (used in jump stubs): Both encodings are 12 bytes

Legacy: mov rax, imm64; jmp rax (12 bytes)
APX: jmpabs imm64 (11 bytes) + nop (1 byte) = 12 bytes
DispatchStubShort (used in dispatch stubs): Both encodings are 18 bytes

Legacy: jne rel32 (6 bytes) + mov rax, imm64; jmp rax (12 bytes) = 18 bytes
APX: jne rel32 (6 bytes) + nop (1 byte) + jmpabs imm64 (11 bytes) = 18 bytes

2. APX Availability Detection

JMPABS availability is determined at runtime via IsJmpAbsAvailable(), which checks HasInstructionSet(InstructionSet_APX) from the JIT's CPU capability flags. Is runtime-only detection sufficient, or do we need additional compile-time or toolchain checks for crossgen/ReadyToRun scenarios?

3. DispatchStubLong JMPABS Support

DispatchStubLong could benefit from JMPABS encoding, but the instruction's 3-byte prefix shifts the 64-bit immediate from offset +2 (legacy mov rax, imm64) to offset +3 (JMPABS). This offset change may break the 8-byte alignment requirement.Should we defer this optimization?

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[Copilot]

Pull request overview

Adds initial AMD64 APX JMPABS support in CoreCLR, wiring it into VM virtual-call stub emission and adding emitter support/tests in RyuJIT.

Changes:

• Extend AMD64 virtual call short dispatch stubs to support an APX encoding path (jne rel32; nop; jmpabs imm64) and use it when APX is available.
• Add VM-side capability detection (IsJmpAbsAvailable) plus a raw emitJmpAbsJump helper, and route emitBackToBackJump through JMPABS when available.
• Introduce INS_jmpabs in the JIT instruction set and add emitter unit-test coverage for encoding.

Reviewed changes

Copilot reviewed 6 out of 6 changed files in this pull request and generated 5 comments.

Show a summary per file

File	Description
src/coreclr/vm/amd64/virtualcallstubcpu.hpp	Adds APX/legacy union encoding for DispatchStubShort, updates fail/impl target accessors, and adjusts short-stub reachability logic.
src/coreclr/vm/amd64/cgencpu.h	Replaces removed thunk helper with IsJmpAbsAvailable declaration and adds emitJmpAbsJump API.
src/coreclr/vm/amd64/cgenamd64.cpp	Implements APX availability detection and emits JMPABS for back-to-back jump stubs (with legacy fallback).
src/coreclr/jit/instrsxarch.h	Adds INS_jmpabs as an APX instruction.
src/coreclr/jit/emitxarch.cpp	Teaches the emitter to size/output INS_jmpabs (REX2 + opcode + imm64).
src/coreclr/jit/codegenxarch.cpp	Adds an emitter unit-test emission site for INS_jmpabs.

[Copilot]

Pull request overview

Copilot reviewed 6 out of 6 changed files in this pull request and generated no new comments.

Suppressed comments (2)

src/coreclr/jit/emitxarch.cpp:17260

• The new INS_jmpabs support in this function conflicts with the existing immed/reloc assumptions immediately below: noway_assert(size < EA_8BYTE || ((int)val == val && !id->idIsCnsReloc())) and the idIsCnsReloc block currently only allow 32-bit immediates and relocations for push. As a result, valid jmpabs uses (64-bit targets and/or relocations) will hit debug asserts. Please special-case INS_jmpabs in those checks.

    emitAttr    size      = id->idOpSize();
    ssize_t     val       = emitGetInsSC(id);
    bool        valInByte = ((signed char)val == (target_ssize_t)val);
    // We would to update GC info correctly
    assert(!IsSSEInstruction(ins));

src/coreclr/vm/amd64/virtualcallstubcpu.hpp:129

• DispatchHolder/LookupHolder now call IsJmpAbsAvailable() and emitJmpAbsJump(), but this header doesn't include cgencpu.h or otherwise declare these functions. That makes the header fragile and can break compilation depending on include order (and virtualcallstub.h includes this directly). Add forward declarations here (or include cgencpu.h) so the header is self-contained.

/*DispatchStubShort*********************************************************************************
This is the logical continuation of DispatchStub for the case when the failure target is within
a rel32 jump (DISPL). Uses a union to handle both legacy and APX encodings. */
struct DispatchStubShort
{

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[Copilot]

Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 1 comment.

[Copilot]

Copilot review overview

🔵 Needs a closer look

Resolve debugger support, preserve non-APX allocation behavior, and add focused APX layout coverage.

Review effort: Lite
Findings: 1 · 2

Open (3)

• This emits a new D5 00 A1 absolute branch, but the AMD64 debugger patch-skip decoder still…
• Add performance measurements for APX and legacy stub layouts
• isJmpAbsEncoding() reads _bytes (a different union member) to detect the encoding. Reading from…

Resolved since last review (1)

• The APX-specific short/long layouts introduced here are only selected when IsJmpAbsAvailable() is…

[jkotas]

What is this block of static asserts trying to validate? Is it still needed?

[jkotas]

This struct definitions include the padding. Should this be == 32 and == 48?

[jkotas]

Move the initialization (VirtualCallStubManager::InitStatic) to be after SetCpuInfo() publishes the APX flag instead of this?