fix(ir): stamp compact mode on a runtime-narrowed matmul accumulator - #2474
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📝 WalkthroughWalkthroughAccumulator tiles with narrowed valid rows now receive ChangesAccumulator compact-mode handling
Estimated code review effort: 3 (Moderate) | ~30 minutes Merge Risk: 🟠 High · up to The change can still produce incorrect results: compact accumulators may be consumed by extraction or move operations that read the wrong row pitch, and accumulator matmul variants can accept incompatible valid row extents. The PR is not merge-ready until those cases are rejected or supported safely. Poem
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In `@include/pypto/ir/type_inference.h`:
- Around line 668-674: Update the tile.extract and tile.move reader paths to
reject compact Acc inputs until PTO-ISA supports compact mode, rather than
accepting types produced by StampCompactForNarrowedAccRows. Add code-generation
coverage verifying both readers reject compact Acc inputs, while preserving
existing behavior for normal Acc types.
In `@src/ir/op/tile_ops/matmul.cpp`:
- Line 202: Require Acc valid-M to be provably equal to the product row extent
before StampCompactForNarrowedAccRows in matmul.cpp, rejecting incompatible
symbolic values unless a backend-safe wider-Acc representation is implemented.
Apply the same proof-based check in matmul_mx_acc within matmul_mx.cpp. Add
regression tests at tests/ut/ir/operators/test_tile_ops.py:2148-2170 and
tests/ut/ir/operators/test_mx_ops.py:317-334 covering runtime-narrowed lhs valid
M with full or differently symbolic Acc valid M, and assert rejection.
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## Summary `mad` and every L0C reader disagreed about the accumulator's fractal stride whenever a matmul's left operand carried a runtime valid row count, so the rows that *were* valid came back scrambled — with no compile diagnostic and no runtime error. **Writer.** `TMATMUL_IMPL` takes M from the L0A operand's *valid* rows and passes it straight to `mad`, which lays the result out in L0C with an N-fractal stride of `ceil(M/16)*16`. Nothing on that path consults the destination's `Rows` (pto-isa `TMatmul.hpp`, a2a3 and a5 alike: `uint16_t m = aMatrix.GetValidRow()`). **Reader.** `TStoreAccNz2nd` and its siblings use the tile's *compile-time physical* `Rows`, switching to `ceil(validRow/16)*16` only for a compact tile (`tstore_common.hpp`). With a 64-row box and 16 valid rows that is a factor-4 skew: the store's N-fractal `j` picks up the matmul's N-fractal `4j`, so only `j = 0` survives. The Acc `TileType` deducers built their `TileView` with a narrowed `valid_shape` but left `compact` at its `null` default. `tile.extract` gained the same stamping for L0A/L0B in hw-native-sys#2232; L0C never did. ## Changes **`StampCompactForNarrowedAccRows`** (`include/pypto/ir/type_inference.h`) sets `CompactMode::normal` when the Acc valid rows are not *provably* equal to the physical rows. Only the row extent decides this — every Acc stride the ISA derives is a function of `validRow` alone, so a narrowed column extent leaves writer and reader in agreement and keeps the historical non-compact form. Compact is stamped only where an accumulator's layout is *established*, and inherited everywhere that merely aliases it: - `tile.matmul`, `tile.matmul_bias` (`src/ir/op/tile_ops/matmul.cpp`) and `tile.matmul_mx*` — all three MX ops route their output type through `DeduceTileMatMulMxType` — derive it. - `tile.matmul_acc` inherits its accumulator operand's mode. The op is `set_output_reuses_input(0)`, and codegen aliases result and operand only when their `TileBufSignature` (compact included) matches, so inheriting keeps that alias legal by construction. - `tile.set_validshape` inherits, as it always did. It is metadata-only and may run *after* the buffer was written, so the pitch its readers must use is the one `mad` already wrote at; deriving a new one from the narrowed rows would re-interpret bytes that were never repacked. Deliberately untouched: `batch_matmul` sets `valid_shape = output_shape` so the predicate can never fire, and the `gemv` family rebuilds its own view in `BuildGemvResultType` (valid rows 1, physical 16), where the stamp is numerically a no-op. **Diagnostic** (`src/backend/common/pto_ops_shared.cpp`): a `tile.assemble` between two Acc windows that disagree on compact is now reported in the user's terms with a remedy, instead of as `pto.subview`'s internal invariant. That shape previously compiled and copied at the wrong pitch — the same defect, on the Acc→Acc path. ## Not fixed here The Acc→L1 readers (`TExtractAccToMat`, `TMovCcToCb`) have no `CompactMode` branch in pto-isa on either a2a3 or a5, so a runtime-narrowed accumulator consumed by `tile.extract` / `tile.move` into L1 still reads at the physical `Rows` pitch. That needs a matching pto-isa change; this commit does not make it worse. Both docs say so. ## Tests - Type deduction (`tests/ut/ir/operators/test_tile_ops.py`, `test_mx_ops.py`): narrowed rows stamp compact for `tile.matmul`, `matmul_bias`, and MX; full rows and column-only narrowing stay non-compact; `matmul_acc` inherits its accumulator's mode; and `set_validshape` neither invents nor drops compact — narrowing an already-written full-width accumulator keeps its physical pitch. - Codegen (`tests/ut/codegen/test_pto_codegen_ops.py`): the emitted `pto.tstore` and the Acc `pto.alloc_tile` both carry `compact=1` for a runtime-narrowed matmul and neither does without narrowing; the rejected `tile.assemble` names its remedy, and the non-narrowed assemble still compiles.
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…he C2V push (#2531) ## Summary Fixes #2510. A `pl.matmul` whose left operand carries a narrowed `valid_shape` row count returned wrong data for the rows that **were** valid when its accumulator was consumed by a vector epilogue in the same scope — 14336 of 65536 elements mismatched, with only the first 16 columns of each `N_TILE` correct. **The mechanism is on the push, not the pop.** `mad` takes M from the L0A operand's valid rows and lays the product out in L0C with an N-fractal stride of `ceil(M/16)*16` (pto-isa `TMatmul.hpp`), and #2474 marks such an accumulator `CompactMode::normal` so readers recompute that pitch. TPUSH reads L0C through `TStoreAccNz2nd`, whose source pitch is derived from `validRow` **for a compact tile** — but `EmitTpushTransportValidShape` rewrote `validRow` to the physical box immediately before the push, so the fix-pipe walked L0C at a stride `mad` never wrote at. From the emitted `.pto` of the failing case: ```mlir %acc__tile = pto.alloc_tile ... valid_row = %c16_index ... compact=1 pto.tmatmul ins(%xk__tile_Left [v_row 16], %w_Right) outs(%acc__tile) // mad: pitch ceil(16/16)*16 = 16 pto.set_validshape %acc__tile, %c64_index, %c128_index : ... compact=1 // transport widening pto.tpush_to_aiv(%acc__tile : ... compact=1) {split = 0} // srcStride = ceil(64/16)*16 = 64 ✗ ``` The issue's own suggested fix — propagating `compact` onto the popped Vec tile — would not have helped: no pto-isa Vec load path reads `TileData::Compact`, and the payload is plain ND by the time it reaches the FIFO slot. That type disagreement is a symptom, not the cause. ## Changes - **`EmitTpushTransportValidShape`** now widens the **columns only** for a no-split Acc→Vec transport and leaves the producer's row extent alone. Columns still need the full box (the slot's row pitch is the physical column count, so a partially written column range leaves stale bytes *inside* the valid rows); rows must not. The transport also moves `validRow` rows instead of the whole box. - **A split Acc→Vec transport now refuses** a row-narrowed compact accumulator instead of miscompiling it. Lane 1 reads the band at the box half, which exists only if the producer wrote the full box, and writing it means reading L0C at the physical pitch — mutually exclusive requirements. That shape returned **1808 of 8192 elements wrong on device**, silently. The refusal is gated on the pitches actually differing, so a single-fractal-block accumulator (`ceil(validRow/16)*16 == Rows`) keeps crossing as before. - **`tile.create` gains an optional `compact` declaration**, and `AutoTileMatmulL0` puts it on the accumulator seed it synthesizes when it splits K. Without it the chain lost the mode on the **store** path too: `tile.matmul_acc` inherits its accumulator operand's compact mode and the seed never carried one, so a plain `pl.matmul` over a K the compiler splits itself hit the same corruption through `TSTORE` (residue of #2470). A *declaration* rather than a pass-applied stamp, because `InferTileMemorySpace` re-deduces every call whose arguments changed and discards the latter, while a kwarg is re-read by the deducer. - **New `AccCompactValid` property + verifier.** Every `tile.matmul_acc` / `tile.matmul_mx_acc` whose lhs valid rows make `mad`'s pitch differ from the accumulator's physical row count must accumulate into a compact buffer, and no tile outside `Left`/`Right`/`Acc` may carry a compact mode at all. Produced by `InferTileMemorySpace`, re-produced by `ExpandMixedKernel`. Two design notes on the verifier, both from formulations that rejected legal IR before being corrected: - It compares **pitches** (`ceil(validRow/16)*16 == Rows`), not valid-vs-physical rows — a `[16, N]` gemv accumulator valid to one row packs to its own box, so demanding the flag there fails legal programs. `AccPitchesCoincide` is shared with `StampCompactForNarrowedAccRows` so stamper and verifier cannot drift. - It sits on the **accumulate op**, not on the readers: a `tile.store` cannot tell a `mad`-written accumulator from an Acc tile a `tile.load` filled at the physical pitch. ## Validation Ascend910B, device 0: | Shape | Before | After | |---|---|---| | Mixed cube+vector epilogue (#2510) | 14336 / 65536 wrong | **0 / 65536** | | GM-staged accumulator, compiler-split K (#2470 residue) | 14336 / 65536 wrong | **0 / 65536** | | Row-narrowed accumulator across `pl.split(UP_DOWN)` | 1808 / 8192 wrong, silently | **compile error naming both DSL alternatives** | The "before" numbers reproduce the issue exactly — same count and same first four values as the report. - New tests, each confirmed **failing on the unfixed build**: 4 codegen UTs (row/column transport, split refusal, single-fractal-block exemption), 6 verifier UTs, 1 auto-tile seed UT, and `tests/st/runtime/cross_core/test_c2v_narrowed_acc_epilogue.py` running both shapes on hardware. - `tests/ut`: 10289 passed. `tests/st/codegen` + `tests/st/runtime/cross_core`: 110 passed on device. All lint checks pass; clang-tidy clean on every changed file. - Docs updated EN + zh: codegen contract, `ir/02-types.md`, the AutoTileMatmulL0 pass doc, and the verifier registry. ## Reviewer notes - **The split refusal can turn a currently-compiling kernel into a compile error.** That is deliberate — those kernels are producing wrong numbers today — but it is the one behavioural change worth a second opinion. It follows the precedent of #2501, and no test in the tree is affected (the `split_aiv_ragged_split_axis` kernel's box is 16 rows, where the pitches coincide). - The #2470 residue documented in that issue's comments (a `pl.create_tensor`-seeded accumulator whose loop-carried phi widens `valid_shape`) is **not** addressed here: it is a `valid_shape` problem rather than a `compact` one, and the new verifier does not flag it because the tile is full-height. - Once this lands, the `MM_ROW_TILE` workaround in pypto-lib's `models/deepseek_v4_flash_mtp/expert_routed.py` can be reverted.
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…2544) ## Summary Finishes #2470. Its first reproducer — an accumulator seeded by `pl.matmul` itself — was fixed by #2474, and #2531 fixed the C2V push plus the seed `AutoTileMatmulL0` synthesizes when it splits K. The reproducer in the issue's comments is the one both left: an accumulator seeded by **`pl.create_tensor` before the K-loop**, which is how the model kernel spells it. ```python acc = pl.create_tensor([1, M_TILE, N_TILE], dtype=pl.INT32) # full height for k0 in pl.pipeline(0, K, K_TILE, stage=2): xk = pl.slice(x, [M_TILE, K_TILE], [m0, k0], valid_shape=[v, K_TILE]) # runtime v if k0 == 0: acc = pl.matmul(xk, wk, b_trans=True, out_dtype=pl.INT32) else: acc = pl.matmul_acc(acc, xk, wk, b_trans=True) y[m0 : m0 + M_TILE, :] = pl.reshape(acc, [M_TILE, N_TILE]) ``` **A loop carry is typed from its init value alone.** `ConvertToSSA` mints the `IterArg` from the reaching definition before the loop, `ConvertTensorToTileOps` re-mints it from the converted seed, and both force the loop's `return_var` back to that same type. The yields are never consulted, so the narrowing every matmul in the body produced dies at the loop boundary: ```text acc__tile : Tile[[64, 256], INT32] <- pl.create_tensor seed iter_arg : Tile[[64, 256], INT32] <- typed from the seed yield : Tile[[64, 256], INT32, Acc, valid=[min(v,64), 256], compact] return_var : Tile[[64, 256], INT32] <- forced back to the iter_arg ``` `mad` takes M from the L0A operand's valid rows and lays the product out in L0C at an N-fractal stride of `ceil(M/16)*16` (pto-isa `TMatmul.hpp`), so a reader that believes the seed's height walks the buffer at the physical row pitch: with a 64-row box valid to 16, store fractal `j` picks up matmul fractal `4j` and only the first 16 columns of each block survive — **75264 of 131072 elements wrong** in the issue's own device run. Since #2531 it no longer ships silently; the kernel simply does not build: ``` [1] ERROR - AccCompactValid Message: 'tile.matmul_acc' accumulates pl.min(v__ssa_v0, 64) valid rows into an accumulator that is not compact (function 'mm_ct'). ``` ## Changes - **The seed is re-declared at the extent the yields prove.** The seed is the only place the rest of the pipeline reads a carry's type from, so narrowing it lets the existing deducers carry the right type through the body on their own — no invented types. The form is `tile.create(compact=True)` + `tile.set_validshape`, exactly what `AutoTileMatmulL0` builds when it splits K; that builder moves into `acc_init::BuildNarrowedAccInit` (new `utils/acc_init_builder.h`) and both callers now share it, so stamper and re-declarer cannot drift on the compact rule. - **The repair runs inside the two passes that create the mismatch**, not as a pass of its own. `ConvertTensorToTileOps` narrows a **2D** seed the moment `tensor.matmul` becomes `tile.matmul`; `FlattenTileNdTo2D` narrows an **ND** seed when `tile.batch_matmul` is unrolled into 2D matmuls. Repairing it at the source is what keeps the pipeline verifiable — measured with the repair disabled, each pass otherwise publishes a carry its own `TypeCheck` diagnostic rejects on the spot: ``` Valid shape dimension mismatch in ForStmt: declared iter_arg[0] dimension[0] = 64, but yield value[0] dimension[0] = pl.min(v__ssa_v0, 64) ``` That report never reaches production today only because `TypeChecked` is verified once, at `pipeline_input`, where `tensor.matmul` has not yet narrowed anything. - **An identity `tile.reshape` now keeps its source's layout triple and memory space.** It re-derived the layout from the shape, which yields the space-agnostic flat default; `NormalizeImplicitTileView` rescues that only for a view that *collapses*, and an Acc box that is narrowed, padded or `compact` never does. The flat layout therefore stuck, and the store between the loop and GM read L0C as a plain row-major buffer. This is the `tile.reshape` half of the open question in #2470's comments — the identity case, which is the one this chain hits; a non-identity reshape of an explicit-view tile is still re-derived and still deserves the broader decision about who owns layout for such tiles. Scope is deliberately narrow, and each limit is a case where widening it would risk changing what a program computes rather than fixing anything: | Limit | Why | | --- | --- | | Acc carries only | L0C is where a stale extent changes the *stride* a reader uses. A Vec seed may hold bytes the first iteration is entitled to read at full height. | | Seeds defined by `tile.create` only | That is what `pl.create_tensor` lowers to; a loaded tile or a parameter may carry bytes whose layout this must not re-interpret. | | Provable narrowing only | A yield extent is adopted when it is provably `<=` the declared one, or when the init still fills its physical box (every `valid_shape` is bounded by that box, so a dynamic extent is already trusted to fit). An init that is *itself* already narrowed is never widened on an undecidable relation. | | Only where the pitches would differ | `AccPitchesCoincide`, shared with the `AccCompactValid` verifier. A single-fractal-block `[16, N]` accumulator packs to its physical rows whatever its valid rows, so it keeps the exact form it has today — which is what pypto-lib's `qkv_proj_rope` projections are. | | Only where the extent is visible before the loop | The re-declared seed sits there, and the common spelling puts the row count next to the slice it bounds, *inside* the body (`kv_rows = pl.min(KV_M_TILE, t_dim - t0)`). Hoisting that leaves codegen with a symbol it cannot bind. Such a carry is declined; where its pitches genuinely differ, `AccCompactValid` then reports it as a compile error rather than letting it corrupt data. Moving the computation instead would need the extent proven loop-invariant — a larger change than this repair. | ## Validation Ascend910B backend, `--codegen-only`. The store now reads the accumulator at the pitch `mad` wrote at, and the destination follows the tile's runtime rows so `TStoreAccNz2nd`'s `validRow == gShape3` precondition holds: ```mlir %acc2d__tile = pto.alloc_tile ... valid_row = %18 ... !pto.tile_buf<loc=acc, rows=64, cols=256, blayout=col_major, slayout=row_major, fractal=1024, compact=1> pto.tstore ins(%acc2d__tile : ...compact=1) outs(%y__ssa_v0_pview : !pto.partition_tensor_view<?x256xi32>) ``` - **11 new UTs** (`tests/ut/ir/transforms/test_narrow_loop_carry_valid_shape.py`): both seed spellings repaired in their own pass, the re-declared form, the full-height and Vec carries that must stay untouched, the whole Default pipeline with verification on for both spellings, the emitted `pto.tstore`, and the two declined shapes — a `[16, N]` accumulator (which also compiles through to PTO codegen, where the first push of this PR reproduced CI's `cannot materialize symbol` failure verbatim) and a loop-local extent. - **1 new device case** in `tests/st/runtime/cross_core/test_c2v_narrowed_acc_epilogue.py` — the hand-written carry, alongside that file's existing #2510 and #2470 readers. - Every one of them was confirmed against a build with the repair disabled: the transform UTs fail on the type mismatch, and the ST case does not compile at all (`AccCompactValid`). - `tests/ut`: **10490 passed**, 1 pre-existing environment failure (`test_symlinked_import_path_still_names_the_caller`, whose subprocess is redirected to the main checkout by this machine's editable install; it fails on an unmodified tree too). - All `tests/lint` checks pass. ## Reviewer notes - **The device case ran on a2a3 in CI and passed**, alongside the two this file already had: ``` test_c2v_narrowed_acc_epilogue.py::TestNarrowedAccEpilogue::test_gm_stored_accumulator_carried_by_a_hand_written_loop[a2a3] PASSED ``` It could not be run from my checkout: this environment's `simpler` predates the runtime bump in #2530 (`ImportError: cannot import name 'DeviceMemoryInfo' from '_task_interface'`), which blocks every ST test under `tests/st/runtime` here, including the two pre-existing ones. Locally it was compiled through the full pipeline instead, with its cube `pto.tstore` verified to be `compact=1` into a `16x128` view. - The `acc_init` extraction preserves `AutoTileMatmulL0`'s behaviour exactly, including the static-full-rectangle short-circuit that keeps the historical single-`tile.create` form byte-for-byte. - With this and #2531, the `MM_ROW_TILE` workaround in pypto-lib's `models/deepseek_v4_flash_mtp/expert_routed.py` should no longer be needed for either shape.
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Summary
A
pl.matmul/pl.matmul_accchain whose left operand carries a runtimevalid_shaperow count silently returned wrong data for the rows that werevalid (issue #2470).
madand every L0C reader disagreed about theaccumulator's fractal stride, with no compile diagnostic and no runtime error.
Writer.
TMATMUL_IMPLtakes M from the L0A operand's valid rows andpasses it straight to
mad, which lays the result out in L0C with an N-fractalstride of
ceil(M/16)*16. Nothing on that path consults the destination'sRows(pto-isaTMatmul.hpp, a2a3 and a5 alike:uint16_t m = aMatrix.GetValidRow()).Reader.
TStoreAccNz2ndand its siblings use the tile's compile-timephysical
Rows, switching toceil(validRow/16)*16only for a compact tile(
tstore_common.hpp).With a 64-row box and 16 valid rows that is a factor-4 skew: the store's
N-fractal
jpicks up the matmul's N-fractal4j, so onlyj = 0survived —matching the reported 2048-correct / 30720-wrong split. The Acc
TileTypededucers built their
TileViewwith a narrowedvalid_shapebut leftcompactat its
nulldefault.tile.extractgained the same stamping for L0A/L0B in#2232; L0C never did.
After this change the emitted
pto.tstoreand the Accpto.alloc_tilebothcarry
compact=1for a runtime-narrowed matmul, so the reader walks L0C at thepitch
madwrote it at. A fully valid accumulator is byte-identical to before.Changes
include/pypto/ir/type_inference.h: newStampCompactForNarrowedAccRows,which sets
CompactMode::normalwhen the Acc valid rows are not provablyequal to the physical rows. Only the row extent decides this — every Acc
stride the ISA derives is a function of
validRowalone, so a narrowedcolumn extent leaves writer and reader in agreement and keeps the historical
non-compact form.
src/ir/op/tile_ops/matmul.cpp:tile.matmulandtile.matmul_biasderiveit;
tile.matmul_accinherits its accumulator operand's mode.src/ir/op/tile_ops/matmul_mx.cpp: derive inDeduceTileMatMulMxType, whichall three of
tile.matmul_mx{,_acc,_bias}route their output type through.A5 shares the contract exactly — its
TMatmul.hppalso takesaMatrix.GetValidRow(), and itsTStoreAcc*honourCompactMode::Normal.src/backend/common/pto_ops_shared.cpp: atile.assemblebetween two Accwindows that disagree on compact is now reported in the user's terms with a
remedy, instead of as
pto.subview's internal invariant. That shapepreviously compiled and copied at the wrong pitch — the same defect on the
Acc→Acc path.
Compact is stamped only where an accumulator's layout is established, and
inherited everywhere that merely aliases it.
tile.matmul_accisset_output_reuses_input(0)— codegen aliases result and operand only whentheir
TileBufSignature(compact included) matches, so inheriting keeps thein-place accumulation legal by construction.
tile.set_validshapelikewiseinherits, unchanged from
main: it is metadata-only and may run after thebuffer was written, so the pitch its readers must use is the one
madalreadywrote at.
docs/{en,zh}/dev/codegen/00-pto_codegen.md: document both automaticnormal(1)paths and the remaining Acc→L1 gap.Deliberately untouched:
batch_matmulsetsvalid_shape = output_shapeso thepredicate can never fire, and the
gemvfamily rebuilds its own view inBuildGemvResultType(valid rows 1, physical 16), where the stamp isnumerically a no-op.
Behavior change
Programs that were silently miscompiled now either produce correct data or, for
the Acc→Acc
tile.assembleshape above, fail at compile time with a messagenaming the remedy. No API or signature changes.
Not fixed here
The Acc → L1 readers (
TExtractAccToMat,TMovCcToCb) have noCompactModebranch in pto-isa on either a2a3 or a5, so a runtime-narrowed accumulator
consumed by
tile.extract/tile.moveinto L1 still reads at the physicalRowspitch. That needs a matching pto-isa change; this PR does not make itworse, and both docs say so.
tile.matmul_accalso still accepts an accumulator whose valid rows arewider than its lhs (
lhs_valid_M <= acc_valid_M), which produces the sameclass of stride disagreement on a different axis and is not fixable by stamping
— a compact tile recomputes its stride from its own
validRow. The MX familyis immune because
DeduceTileMatMulMxAccTypeenforces equality. Left for aseparate change.
Tests
tests/ut/ir/operators/test_tile_ops.py,test_mx_ops.py: narrowed rowsstamp compact for
tile.matmul,matmul_bias, and MX; full rows andcolumn-only narrowing stay non-compact;
matmul_accinherits itsaccumulator's mode; and
set_validshapeneither invents nor drops compact —narrowing an already-written full-width accumulator keeps its physical pitch.
tests/ut/codegen/test_pto_codegen_ops.py: the emittedpto.tstoreand theAcc
pto.alloc_tileboth carrycompact=1for a runtime-narrowed matmul andneither does without narrowing; the rejected
tile.assemblenames itsremedy, and that remedy compiles.
Verification
Run on a linked worktree with the branch rebased onto the current
origin/main, Ascend910B backend,PYPTO_VERIFY_LEVEL=roundtripper-passverification from the UT conftest.
cmake --build build --parallel 32: exit 0, no warnings.pytest tests/ut/ tests/lint/ -n 16 -q: 10223 passed, 8 skipped, 1 failed.The one failure is
tests/ut/language/test_unified_ops.py::TestUnifiedSlicePadValue::test_symlinked_import_path_still_names_the_caller,which is an artifact of this machine's editable install hijacking
import pypto(AssertionError: import bypassed the symlink). It reproduceson an unmodified checkout and is unrelated to this change.
pytest tests/st/codegen/dsl --codegen-only -n 16 -q: 25 passed.clang-format --dry-run --Werroron all five changed C++ files: clean.ruff format --checkandruff checkwith the project's settings on thethree changed test files: clean (the only
ruff checkfindings are onpre-existing lines, none on lines this PR adds).
pyrighton the three changed test files: 0 errors, 0 warnings.Not run: on-device execution. The issue's reproducer needs pypto-lib's
goldenharness and an a2a3 device; the reporter already verified on hardware that
rewriting
CompactMode::NulltoCompactMode::Normalon the generated Acctiles turns the FAIL into a PASS, and this change makes the compiler emit
exactly that.