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media: apple: avd: AV1 picture overlap across the VP engines - #793
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Keep two complete AV1 scratch banks on queued firmware advertising tagged VP DONE. Look ahead at the pending request's frame control and follow its actual primary-reference timestamp. Default CDFs and references outside the in-flight set do not wait for an unrelated picture. The open firmware's VP event does not establish CPU visibility of AV1 hardware-written CDF, segmentation or motion-field tails. Retain PP retirement dependencies for those inputs. When frame-end CDF updates or segmentation-map writes are disabled, copy preparation's immutable input snapshots into the consumer bank instead of reading live CAPTURE storage. Only PP retirement releases the saved picture's bank. Preserve the legacy emitters and tail preparation, add production host flag/ownership tests and a routed AV1 Unicorn overlap test, and document the remaining visibility evidence requirement. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Let independent AV1 pictures fill the firmware-advertised VP pool, with one scratch bank per engine and one retained by PP. Keep the two-bank old-queue and one-bank legacy fallbacks, and leave VP9's bank limit unchanged. A different VP no longer supplies the implicit same-engine ordering of the two-bank path. Track tagged VP completion in each saved AV1 CAPTURE bank and block a consumer naming that producer until its VP callback. Duplicate callbacks never release storage. Updated CDF, segmentation and motion-field inputs still require PP retirement; immutable CDF/map copies stay private to the consumer bank. Do not infer CAPTURE DMA visibility from a CM3 DMB. Extend production host and routed firmware tests for pool sizing, all three AV1 engines, reverse VP completion, reference barriers, outbox pressure, allocation failure, saved-bank error retirement and reset. Compare legacy programs and tails with the pre-overlap driver including film grain control values and show flags at 8/10 bits. Device pixel and throughput qualification remains required. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
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…tion/aurora Bring integration/aurora up to aurora-wip 52f0a6b, the source of 7.3.0-aurora-fleet14h, promoted on all four machines on 2026-11-02. The range also covers the fleet14g source b35adc7. It adds aurora-silicon#792, aurora-silicon#750, aurora-silicon#783, aurora-silicon#784, aurora-silicon#793, aurora-silicon#774, aurora-silicon#794, aurora-silicon#796, aurora-silicon#798, aurora-silicon#800, aurora-silicon#802 and aurora-silicon#801. No conflicts. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
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AV1 still decoded one picture at a time on the queued transport, while H.264, HEVC and VP9 overlap and spread over the VP engines since #787. AV1 was the slowest codec relative to macOS.
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