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Merge aurora-wip batch 3 (fleet14g to fleet14h, 52f0a6be) into integration/aurora - #874
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Track pending execution UUIDs before channel-7 publication and retire only matching terminal channel-6 events. Keep one deadline across acknowledgment and completion, order coherent DMA accesses, and quarantine failed or uncertain requests without exposing private output mappings. Validate complete HWX containers, tensor and program descriptors, aperture records, symbols and payload-only kernel relocations. Match execute buffers to kernel-owned process resources and revoke per-file authority on close. Add hardware-free KUnit coverage for validation and pending request paths. Keep H16 registration and section-only loading refused until preload, startup, the original-container ABI and process-resource decoding exist. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Authenticate stable, owned resident firmware snapshots against the pinned normalized digest, checking every patchbay tag and width and masking only the reviewed mutable value cells and exact tunables interval. Keep live page acquisition behind the boot backend ownership gate. Import original HWX bytes once before validation and hashing, retain whole segment geometry, and bound private load plans before DMA allocation. Validate backend mapping geometry and decoded process bindings without accepting userspace resource authority or publishing partial results. Keep H16 registration, section-only loading and process creation refused: the load/process wire bodies, allocation replies and physical boot backend still require reviewed providers. Add hardware-free KUnit coverage for the identity, import, planning and resource paths. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
The accepted dependency patch is already applied verbatim as 4700e91, with SHA-256 89bdf5072e468dd750580348679c0caa552ad26a07911ed218ac809495a1e8fd. Record the original PR #681 head as an ancestor so merging it upstream does not create add/add conflicts for the already extended HWX files. Preserve the current source tree unchanged. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Describe the four inclusive DAPF ranges in record order so that the firmware backend can derive both its filters and identity MMIO pages from DT. Require them for T6041 and exercise the preload properties in a T6041 example. The preload DVAs are fixed; only physical reservations need to be supplied by the bootloader. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Describe the four DAPF ranges and preload device addresses without fixing boot-specific physical addresses. Hook the J616s ANE to disabled no-map TEXT and DATA placeholders for the bootloader to fill from segment-ranges. Widen the three DART windows down to zero, preserving their upper bound at 0x3ffffffffff. apple-dart uses the window for forced domain geometry, including private paging domains. Raw iommu_map() currently permits low mappings outside that geometry, but relying on that leaves the domain's advertised aperture inconsistent with the firmware's identity MMIO pages. The widened window covers both those pages and the high firmware DVAs. Add a tether-only test DTS that enables the existing ANE and three DART nodes. The shipping board tree keeps them disabled. Preload reservations remain disabled in both trees until a loader completes the handoff. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Enable the ANE and its three DARTs only for the tether-loaded test DTB. Keep the shipping board tree disabled and require the loader to fill the preload reservations before the driver can pass preflight. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Validate the dynamic channel table before arming host rings, publish pool-backed commands, check replies and consume owned reports. Provide bounded SHAREDMALLOC allocations and match-data IRQ helpers with absolute command deadlines and retained failure state. Exercise malformed descriptors, ring ordering, reply corruption, report ownership, allocation ceilings and deadline expiry using synthetic KUnit accessors. Keep probe and hardware ownership unchanged. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Include the existing tether DTS so the ANE test boot keeps its debug console and the host-owned ATC0 path. Layer only the four ANE and DART status enables on top of that established tether configuration. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Clarify that the backend resolves bindings from validated program metadata. CREATE_PROCESS reply IDs do not describe a resource map. Keep wire serialization and process installation separate from geometry validation, with the existing default refusal unchanged. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Install a read-only observer before the platform bus can power or attach DMA. Require loader raw-boot evidence and the measured cold CPU, child, CE and DART state before acquisition. Add staged power, private SID0 mapping, preload verification, scratch boot and four-command startup. Restrict the ANE DART profile to SID0 without resetting foreign streams. Deny secure and Exclave commands at publication. Add an internal program path with kernel-tag validation, UUID and exact-output completion and an observed FREE acknowledgment that retains backing until reboot. Refuse a second program lifetime: H17 can reuse the previous output BAR on a later program's first job. Normal map synchronization remains; extra TLB invalidates do not fix this defect. Original-HWX frontend integration and a production immutable-DATA manifest remain pending. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Describe the measured child PWGATE window, four DAPF ranges and the loader's per-boot DATA preservation digest. Allow disabled nodes to specify firmware DVAs before the loader supplies preload reservations. Give the three ANE DARTs a dedicated compatible so their SID0-only ownership profile is determined by DT rather than an operator knob. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Supply PMGR, PWGATE and the four ordinary SID0 DAPF ranges. Remove the high-only DART DMA window so the private domain can reach the identity MMIO pages as well as the firmware DVAs. Keep production nodes disabled. Add a separate test DTB that enables the ANE and its three SID0-only DARTs. It supplies neither loader cold-boot evidence nor personalized preload addresses; the trusted loader must provide those for acquisition. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Hold the system sleep lock across staged actions so acquisition cannot race a suspend preparation that observed the old unretained state. Document maintenance coverage for the explicit lead test DTB. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Keep the one-program-per-firmware-boot restriction at the shared publication boundary as well as in the backend. Verify refusal after a successful LOAD and UNLOAD without writes, pool consumption or a pending transaction. Retain the kernel-tag and secure-command policy tests. Track allocation tags so teardown waits for the exact CREATE EXPP pool's FREE rather than an unrelated free. Reject duplicate DART phandles and malformed CPU-load notifications before using their state. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Keep the transport publication calls separate from the assertion macros so the second-LOAD cases pass strict checkpatch alignment checks. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Include platform_device.h before dereferencing the backend platform device and of_device.h for of_dma_configure(). The arm64 LLVM build otherwise fails on incomplete types and an implicit function declaration. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Record the wrapped replacement description for commit 0a3bdfc. Keep the published history intact. Validate the dynamic channel table before arming host rings, publish pool-backed commands, check replies and consume owned reports. Provide bounded SHAREDMALLOC allocations and match-data IRQ helpers with absolute command deadlines and retained failure state. Exercise malformed descriptors, ring ordering, reply corruption, report ownership, allocation ceilings and deadline expiry using synthetic KUnit accessors. Keep probe and hardware ownership unchanged. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Use the shared DAPF and preload property names for staged boot. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Reuse the accepted normalized preload checker for the pinned 26A428 image. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Describe the engine, PMGR and PWGATE windows required by the T8140 binding, and include its required DAPF ranges. The old example only provided the engine window, causing dt_binding_check diagnostics. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Keep default registration refused and add explicit preflight, map, boot and startup stages for the pinned H16 27.0 26A428 preload. Reuse the shared transport and immutable preload checker, keep genpd transitions separate from read-only power checks, and run the CE and ordered tunables before scratch publication. Keep all firmware-visible state and a module reference after RUN, including every uncertain failure. Exercise the sequence with a simulated engine and document each tether rung. Require a SID-0-only test description rather than silently claiming SID 11 with the generic IOMMU attachment API. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Simulate offered RTKit traffic, absent heaps, power and RVBAR refusals, post-RUN DART faults and mapping failures. Keep pool pointer arithmetic inside its allocation and handle a failed domain allocation explicitly. Require coherent clients for the private surfaces. Architecture cache preparation helpers are not exported for a module, so refuse an unsupported memory model rather than leave a cached alias without synchronization. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Opt the pinned H16 build into the native FREE tuple established by the round-5 facts. Resolve only live provider-owned DVAs, publish the zero reply, and retire report authority while retaining backing mappings and quota. Keep other firmware profiles on the conservative default and refuse control requests whose lookup fields have no proved wire layout. Cover locked matching filters, heap/shared overlap, native and foreign FREE, and control refusal in the simulated engine. Complete the polled interrupt acknowledgment before ring reads and keep the coherent-client refusal at pool allocation so the map rung remains available. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Expose CE acknowledgment, tunable group completion and locked mismatches before scratch release, and log a validated nonzero firmware acknowledgment. Clarify that native FREE is enabled only by the pinned H16 profile while the generic transport retains its conservative default. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
The task-stream gate now requires the fixed H16 prologue, u32 1 followed by twelve zero bytes, but the synthetic HWX fixture still started its stream with sixteen zero bytes. Every suite case that validates the fixture therefore failed, including the load-plan and resource cases. Write the prologue word and move the fixture builder into a shared test header so the program suite can build the same containers. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
EXECUTE descriptor indices are local to the descriptor class, matching the separate input and output request arrays. The add-128 program has an input and the output that both use index 0. The resource check refused any repeated index, so such a program could never be described. Refuse a repeated index only within one class. Cover the add-128 shape of input, output and input with indices 0, 0 and 1. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Add the program lifecycle on the shared firmware transport, following the H16 cold-boot facts (program load and lifecycle, round 5 slot sources) and the SPEC-r4 EXECUTE layout. LOAD_PROGRAM is 0x1c0 bytes with nine 0x30 slots from one table. Slot 0 is the host-built generic section (index 1002), slot 1 the HWX kernel section when present (1007, class 3), slot 2 the task stream (1006), slots 3, 4 and 6 the operation, procedure and text-property sections (1003 to 1005). The request carries 0xffffffff at +0x1b8 and the reply must echo every slot and replace that word. CREATE_PROCESS is 0x258 bytes with a zero body, which the reply must keep. Program and process ID 0 are valid. TERMINATE (0x10) and UNLOAD (0xc) close a program. EXECUTE resources come from a kernel-owned map, with the class from the resource usage mapping and an index local to that class. The linear program descriptor's mcache tuple adds one custom-BAR record. Each request sends 0x002d with 0, keeps its UUID pending before publishing on channel 7, completes only on a state-1 0x0300 report that matches the UUID and the program, process and procedure IDs, then sends 0x002d with 1 and issues a DMA read barrier. Failure reports, mismatched IDs, malformed reports and timeouts quarantine the session with every mapping retained. A firmware session accepts one program lifetime. On this firmware family the first EXECUTE of a newly loaded program writes into the previous program's output buffer, so a second LOAD fails with -EBUSY, also after UNLOAD. The transport now refuses to publish secure-mode commands 0x27, 0x28, 0x34 and exclave commands 0x30, 0x31. Sequences that cannot fit the monotonic command arena are refused before the first command. KUnit drives a synthetic firmware through two executions and teardown, and covers add-128 and kernel-section slot packing, reply refusals, the deny list, the custom-BAR record, the second-LOAD refusal, mismatched UUIDs and IDs, state-2 quarantine and arena exhaustion. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Extend the staged H16 opt-in with h16_stage=program. After the startup commands it opens one program session and registers an accel node with ABI version 3 and the GET_CAPS, H16_LOAD and H16_EXEC ioctls. Without that stage there is no node, so the default refusal and the H17 refusal are unchanged. H16_LOAD imports the original HWX once, validates it, places each region and each host-built section in its own private mapping in a 1 GiB window above the SHAREDMALLOC range, then loads the program and creates its process. Only the output surface and scratch are device-writable. The program belongs to the file and is torn down when the file closes. H16_EXEC copies inputs in, poisons the output mapping, runs one request and copies the output out. Userspace never passes DVAs, firmware IDs, resource indices or commands, and a second load in one firmware boot is refused with a log line that asks for a reboot. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Bring the omacom integration work into aurora-wip, reviewed and regression-tested
The H16 channel IRQ stays masked, so every wait polls, and each poll slept a fixed 1 ms. An EXECUTE waits four times (opening gate reply, EXECUTE ack, completion report, closing gate reply), so it paid at least four milliseconds of sleep however fast the engine was. MobileNet took 6.6 ms per request where the H14 path needs about 1.1 ms. Tell relax() how long the current wait has run and pick the sleep from that: 20-50 us for the first 5 ms, which covers replies and a whole inference, then 250 us, and after 50 ms the old 1 ms cadence, so slow startup waits and stalls cost no more CPU than before. Count every sleep in the transport so callers can report polls per request. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
wifi: mt7932: WPA2 PMF on the PSK AKM, and connect right after a cancelled scan
The host only saw one number per MobileNet request, so there was no way to tell engine time from poll latency, copies or userspace overhead. Time every successful EXECUTE: the opening gate round trip, EXECUTE to its channel-7 ack, the ack to the first report of the request, that report to the completion, the closing gate round trip, the whole firmware span, and the sleeps between polls. The ioctl adds the input copy (with the output poisoning), the output copy and the whole request. <debugfs>/ane-h16/<dev>/execute prints the last, mean, minimum and maximum of each phase since the last reset; writing to it resets. The same breakdown of each request goes to drm_dbg_driver(). Failed requests are not counted. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
On the J616s, kit v6 timed MobileNet at 4.0 ms per EXECUTE ioctl while the firmware span was 1.04 ms and the copies were 26 us: 2.9 ms went nowhere the breakdown looked. ane_h16_session_execute() ran SHA-256 over the whole HWX snapshot before each request, 8.4 MB for MobileNet. LOAD already hashes and parses the snapshot, and copies everything the firmware reads out of it into private mappings. The snapshot then stays private and unchanged until the program is freed, so the hash per request checked nothing new. Keep the cheap resource check and drop the hash. Time the rest of the ioctl too, so the phases add up: the session lock wait, the work before the opening gate (prepare) and after the closing gate reply (finish). The ioctl total now starts before the lock. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
media: apple: avd: AV1 picture overlap across the VP engines
media: apple: isp: temporal filter and mains frequency as macOS sets them (J700, J616s)
accel/ane: H16 EXECUTE latency 6.6 ms to 0.77 ms
The accel node had no fop_flags, so the VFS refused to open it on the fleet kernels, which require FOP_UNSIGNED_OFFSET for DRM-style nodes whose offsets are never negative. The node does no mmap and no seeking, so declaring unsigned offsets is correct and makes it openable again. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
The performance supplier may request a PMP device level instead of holding a PMC rail directly. Both use the existing runtime power-domain link. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Give AVD a PMP report domain with soc-device record 17 and a level-2 request in SOC-DEV-DVFS entry 0x19a (DVFS ordinal 10). The existing runtime PM domain links hold it while decoding and release it on autosuspend. The provider admits the power request before the floor and drops the floor before releasing power. The PMP votes the SOC rail through its static PMC agent. AVD has no cluster-agent bit on T8140: the VENC cluster belongs only to AVE. Keep the physical AVD domain for the core and reset, and attach the report as its performance supplier. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Bring the H16 first-inference and latency work into the H17 clean path, which shares ane_h16_session, the transport and the ABI 3 node: - the first EXECUTE of a program on the engine, the first one after boot included, takes the queued path (+0x30 bit 0); the session tracks this by program generation, so it applies to H16 and H17 - each EXECUTE descriptor carries the whole HWX section of its surface - a failed EXECUTE logs its step and flags, the reports and last state seen, the rows sent and acknowledged, and the firmware log ring - waits poll in 20-50 us steps and back off on long waits; the H17 backend uses the same steps - no SHA-256 of the HWX on every EXECUTE - the J616s ANE device tree, H14 lifetime and PM work, timing stats Conflicts resolved: - program lifetime: a LOAD is refused while the previous program is still loaded (H16); a switch-safe transport (H17) keeps holding several programs, and its transport still requeues on every program or process change - the linked-program scratch binding was written on both sides; keep one copy in the bindings loop, accepting a size from the __bss size up to its 16 KiB mapping - queued flag: one name, ANE_H16_EXECUTE_FLAG_QUEUED; shared tags: shared_tags - the accel node fop_flags were set on both sides; keep one - the fake firmware in the program KUnit hands out the lowest free program and process IDs and reuses them after teardown, and H17 MobileNet now expects the whole 0x4c000 input section Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
The H17 firmware owns 0x380000 bytes from its TEXT DVA (boot argument +0x10), but the preload covers only TEXT (0xc0000) and DATA (0x2ac000), so the last 0x14000 bytes, 0x1000036c000 to 0x10000380000, were never mapped. The firmware keeps runtime heap state there: on the Neo the first relu program faulted on DART0 right after CREATE (writes at 0x1000037c040 to 0x1000037fc00), and the EXECUTE then timed out. The research harness had mapped the whole span. Map that tail zeroed and device-writable right after the preload, as the H16 backend does, and keep it until reset like the preload. The layout check refuses a DATA segment that overlaps TEXT, runs past the span, is not in whole 16 KiB pages, or a span that reaches the command pool. Name the span once and use it for the boot argument too. KUnit: the measured layout, a DATA segment that ends the span, and the refused layouts. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
ane_h16_boot_data.h defines the per-revision MMIO table and the profile table for every unit that includes it. The boot KUnit uses only the MMIO table and the preload KUnit only the profiles, so W=1 warned about the other one in each. Mark both __maybe_unused. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
After every mode set on an external display, macOS sets IOMFB parameter 3 to 1.0 and parameter 6 to 1.0 for an SDR colour mode or 2.0 for a PQ one (16.16 fixed point), on the Neo (macOS 26.6.2) and on the J616s (macOS 27). Linux sent neither, so the external processor ran HDR with different brightness hints than under macOS. Send the same two parameters after each successful mode set on the H17P external path, and log a parameter the firmware does not take. On the Neo with an MSI MPG 325CQRXF, the firmware takes both with status 0 on each of four PQ and SDR mode sets. macOS also ramps parameter 6 towards the content's headroom (about 4.2 on that monitor) while HDR content is shown; that part is not done here. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
drm/apple: send the external HDR brightness hints macOS sends (H17P)
arm64: dts: apple: t8140: give the video decoder its PMP performance request
On the Neo (fleet14g, attempt C) the first queued relu EXECUTE reached EXELOOP, which logged the mcache custom BAR record (config 1, type 0, BAR 4, value 36) and then asserted in CAneProgramManagerHx.cpp line 416. No report followed and the request timed out. The record comes from the linear program descriptor relocation tuple, as on H16. Every H17 request that ran, including the 16/16 relu, add and MobileNet runs, sent none. Send no custom BAR record from an H17 session; the firmware keeps its default mcache DSID. H16 is unchanged. The program buffers landing at the DVA the research harness gave its EXPP allocation is not an overlap: shared allocations and program mappings come from the same bump allocator, and the EXPP allocation follows the program mappings. KUnit: an H17 session loads a linear program, sends no record, and the EXECUTE has the base length with a zero record count. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
Give queued AV1 banks separate coherent CDF output, seeded from the selected primary context. A consumer can snapshot it after the producer's tagged VP completion, without reading a CAPTURE tail still owned by PP. Save successful output to the existing CAPTURE tail at PP retirement; discard failed output and retain segmentation and temporal-MV PP barriers. Reuse and zero equal-sized scratch allocations only after a queued bank is free, removing repeated DMA mapping work from prepare. Keep the single-bank path unchanged. Extend production host fixtures for adaptive output inheritance, completion barriers, PP persistence, errors, bank reuse and scratch zeroing/resize. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
On the Neo (fleet14g) the first relu64 EXECUTE, sent with no custom BAR record, still made the H17 firmware assert in its program manager (CAneProgramManagerHx.cpp line 416) right after it logged the request: two buffers of 0x1000 bytes. The generic section installed at LOAD declares both relu64 buffers as 0x4000 bytes (the surface allocation), and the research harness, which ran relu, add and MobileNet on the Neo, always sent that declared size. The descriptor carried the HWX section size instead, which is smaller for relu64 and add64. Send the size the generic section declared for each buffer. It lies between the tensor span and the mapped allocation, so the descriptor never reaches past the mapping. MobileNet is unchanged: its declared input size is the whole 0x4c000 section. The LOAD sections the kernel installs for relu are byte-identical to the harness package; the resource IDs differ only in numbering the harness also used. KUnit: the session test now expects the declared size for both descriptors. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
media: apple: avd: start AV1 pictures at the CDF producer's VP completion
7da7f19 made every EXECUTE descriptor carry the buffer size the generic section declared at LOAD. That fixed the H17 program-manager assert (relu64 and MobileNet then passed on the Neo), but it also changed H16, where only the whole-section size has run on the J616s. For small H16 programs the declared size is the larger allocation, which the H16 firmware has never been sent. Use the declared size on H17 only and keep the HWX section size on H16. MobileNet is unaffected on both: its declared input size is the whole 0x4c000 section. KUnit: the H16 session test expects the section size again; the H17 linear-program test expects the declared size, which differs from the section there. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
…cans Directed scans set SSID type 8. With that type the firmware matched what it reported against the SSID it remembered for each BSSID, so a BSSID that changed its SSID stayed invisible to directed scans until a wildcard scan refreshed it. NetworkManager and wpa_supplicant scan with the target SSID, so such a network took several rounds to join or failed as "network could not be found". Use type 4, the specified-plus-wildcard SSID type the other connac firmware takes. Directed probe requests are still sent: a capture at the access point shows them for a hidden network. Tested on J700 against hostapd 2.12 with one BSSID switching between two SSIDs: the first directed scan after a switch found the new SSID 8 of 8 times, against 4 of 8 with type 8. Hidden 5 GHz networks and visible 6 GHz networks are found as before. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
…-type wifi: mt7932: ask for the listed SSIDs and the wildcard in directed scans
accel/ane: H17 (Neo) clean driver: first inference, MobileNetV1 16/16
…tion/aurora Bring integration/aurora up to aurora-wip 52f0a6b, the source of 7.3.0-aurora-fleet14h, promoted on all four machines on 2026-11-02. The range also covers the fleet14g source b35adc7. It adds #792, #750, #783, #784, #793, #774, #794, #796, #798, #800, #802 and #801. No conflicts. Assisted-by: LLM Signed-off-by: Ryan Murray <ryan@aurorasilicon.org>
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Batch 3 of 6 bringing integration/aurora up to aurora-wip. It's a merge commit, with no rebase and no rewrite.
Range
aurora-wip up to 52f0a6b (fleet14h). The range also covers the fleet14g source (b35adc7).
PRs: #792 M2 SIO, #750 J616s ANE H16, #783 omacom up-port, #784 Neo mt7932 PMF/scan, #793 AV1 overlap + multi-VP, #774 camera ISP, #794 ANE latency, #796, #798 Neo AVD perf DT, #800 AV1 single-stream overlap, #802 mt7932 directed scan, #801 Neo H17 ANE (DT-disabled).
No conflicts. The merged tree is the aurora-wip boundary tree plus the #858 and #860 patch content that integration/aurora already had (as #855 and #856). Only drivers/usb/typec and the aurora-sep files differ from the booted fleet source.
Hardware evidence
Source: aurora-ctl/reports/fleet14-20261101/RESULTS.md
Gates on this merge tree (buildbox, fleet recipe: canonical Fedora asahi base + asahi.config)
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